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Re: [Qemu-devel] ARM invalid co-processor register
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] ARM invalid co-processor register |
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Date: |
Wed, 25 May 2016 13:35:38 +0100 |
On 25 May 2016 at 13:33, Karthik <address@hidden> wrote:
> Does the qemu implements cache emulation?
> I did see some comments saying otherwise.
No, we don't emulate functional caches. This means that all
the operations for "flush cache" etc can be no-ops. They
do still have to actually exist and not UNDEF, though.
thanks
-- PMM