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Re: [Qemu-devel] [Qemu-ppc] [PULL 04/12] ppc: tlbie, tlbia and tlbisync
From: |
David Gibson |
Subject: |
Re: [Qemu-devel] [Qemu-ppc] [PULL 04/12] ppc: tlbie, tlbia and tlbisync are HV only |
Date: |
Wed, 1 Jun 2016 12:15:11 +1000 |
User-agent: |
Mutt/1.6.1 (2016-04-27) |
On Tue, May 31, 2016 at 11:28:49PM +0100, Mark Cave-Ayland wrote:
> On 31/05/16 01:41, David Gibson wrote:
>
> > From: Benjamin Herrenschmidt <address@hidden>
> >
> > Not that anything remotely recent supports tlbia but ...
> >
> > Signed-off-by: Benjamin Herrenschmidt <address@hidden>
> > Signed-off-by: David Gibson <address@hidden>
> > ---
> > target-ppc/translate.c | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> > index dfd3010..690ffd2 100644
> > --- a/target-ppc/translate.c
> > +++ b/target-ppc/translate.c
> > @@ -4858,7 +4858,7 @@ static void gen_tlbie(DisasContext *ctx)
> > #if defined(CONFIG_USER_ONLY)
> > gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
> > #else
> > - if (unlikely(ctx->pr)) {
> > + if (unlikely(ctx->pr || !ctx->hv)) {
> > gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
> > return;
> > }
> > @@ -4879,7 +4879,7 @@ static void gen_tlbsync(DisasContext *ctx)
> > #if defined(CONFIG_USER_ONLY)
> > gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
> > #else
> > - if (unlikely(ctx->pr)) {
> > + if (unlikely(ctx->pr || !ctx->hv)) {
> > gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
> > return;
> > }
> > @@ -4898,7 +4898,7 @@ static void gen_slbia(DisasContext *ctx)
> > #if defined(CONFIG_USER_ONLY)
> > gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
> > #else
> > - if (unlikely(ctx->pr)) {
> > + if (unlikely(ctx->pr || !ctx->hv)) {
> > gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
> > return;
> > }
>
> Unfortunately this patch breaks qemu-system-ppc for both g3beige and
> mac99 under TCG causing a freeze in OpenBIOS when starting
> qemu-system-ppc with no parameters.
Bother, sorry.
I think this is because I applied this without the patch that treats
machines with no hypervisor mode (e.g. Apples) as always being in
hypervisor mode.
> Note that there is also another regression that has recently landed in
> git master so you'll also need to revert
> e7c9136977cb99c6eb52c9139f7b8d8b5fa87db9 in order to get back to a
> functioning OpenBIOS.
I'd preter to see it fixed rather than just reverted..
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-devel] [PULL 00/12] ppc-for-2.7 queue 20160531, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 12/12] cpu: Add a sync version of cpu_remove(), David Gibson, 2016/05/30
- [Qemu-devel] [PULL 01/12] ppc: Remove MMU_MODEn_SUFFIX definitions, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 08/12] ppc: Add PPC_64H instruction flag to POWER7 and POWER8, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 04/12] ppc: tlbie, tlbia and tlbisync are HV only, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 10/12] exec: Do vmstate unregistration from cpu_exec_exit(), David Gibson, 2016/05/30
- [Qemu-devel] [PULL 06/12] ppc: Fix sign extension issue in mtmsr(d) emulation, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 07/12] ppc: Get out of emulation on SMT "OR" ops, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 03/12] ppc: Do some batching of TCG tlb flushes, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 02/12] ppc: Use split I/D mmu modes to avoid flushes on interrupts, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 11/12] cpu: Reclaim vCPU objects, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 09/12] exec: Remove cpu from cpus list during cpu_exec_exit(), David Gibson, 2016/05/30
- [Qemu-devel] [PULL 05/12] ppc: Change 'invalid' bit mask of tlbiel and tlbie, David Gibson, 2016/05/30