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[Qemu-devel] [PULL 13/26] ppc: fix hrfid, tlbia and slbia privilege
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 13/26] ppc: fix hrfid, tlbia and slbia privilege |
Date: |
Tue, 7 Jun 2016 20:48:00 +1000 |
From: Cédric Le Goater <address@hidden>
commit 74693da98894 ('ppc: tlbie, tlbia and tlbisync are HV only')
introduced some extra checks on the instruction privilege. slbia was
changed wrongly and hrfid, tlbia were forgotten.
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/translate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index c6b74b8..5fdcd22 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -4108,7 +4108,7 @@ static void gen_hrfid(DisasContext *ctx)
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
#else
/* Restore CPU state */
- if (unlikely(!ctx->hv)) {
+ if (unlikely(ctx->pr || !ctx->hv)) {
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
return;
}
@@ -4845,7 +4845,7 @@ static void gen_tlbia(DisasContext *ctx)
#if defined(CONFIG_USER_ONLY)
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
#else
- if (unlikely(ctx->pr)) {
+ if (unlikely(ctx->pr || !ctx->hv)) {
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
return;
}
@@ -4913,7 +4913,7 @@ static void gen_slbia(DisasContext *ctx)
#if defined(CONFIG_USER_ONLY)
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
#else
- if (unlikely(ctx->pr || !ctx->hv)) {
+ if (unlikely(ctx->pr)) {
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
return;
}
--
2.5.5
- [Qemu-devel] [PULL 19/26] ppc: Fix tlb invalidations on 6xx/7xx/7xxx 32-bit processors, (continued)
- [Qemu-devel] [PULL 19/26] ppc: Fix tlb invalidations on 6xx/7xx/7xxx 32-bit processors, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 05/26] spapr_iommu: Migrate full state, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 21/26] ppc: POWER7 had ACOP and PID registers, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 07/26] spapr_pci: Reset DMA config on PHB reset, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 10/26] spapr: Introduce pseries-2.7 machine type, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 26/26] ppc: Do not take exceptions on unknown SPRs in privileged mode, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 08/26] spapr_pci: Add and export DMA resetting helper, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 11/26] ppc: Better figure out if processor has HV mode, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 16/26] macio: use DMA memory interface for non-block ATAPI transfers, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 17/26] dbdma: use DMA memory interface for memory accesses, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 13/26] ppc: fix hrfid, tlbia and slbia privilege,
David Gibson <=
- [Qemu-devel] [PULL 22/26] ppc: POWER7 has lq/stq instructions and stq need to check ISA, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 18/26] ppc: Properly tag the translation cache based on MMU mode, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 15/26] target-ppc: fixup bitrot in mmu_helper.c debug statements, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 01/26] target-ppc/fpu_helper: Fix efscmp* instructions handling, David Gibson, 2016/06/07
- [Qemu-devel] [PULL 09/26] spapr: Increase hotpluggable memory slots to 256, David Gibson, 2016/06/07
- Re: [Qemu-devel] [PULL 00/26] ppc-for-2.7 queue 20160607, Peter Maydell, 2016/06/07