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[Qemu-devel] [PULL 5/8] ppc: Add PowerISA 2.07 compatibility mode
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 5/8] ppc: Add PowerISA 2.07 compatibility mode |
Date: |
Tue, 14 Jun 2016 15:54:47 +1000 |
From: Thomas Huth <address@hidden>
Make sure that guests can use the PowerISA 2.07 CPU sPAPR
compatibility mode when they request it and the target CPU
supports it.
Signed-off-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr_hcall.c | 6 ++++--
target-ppc/translate_init.c | 3 +++
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index cc16249..2ba5cbd 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -927,7 +927,7 @@ static void cas_handle_compat_cpu(PowerPCCPUClass *pcc,
uint32_t pvr,
unsigned *cpu_version)
{
unsigned lvl = get_compat_level(pvr);
- bool is205, is206;
+ bool is205, is206, is207;
if (!lvl) {
return;
@@ -939,8 +939,10 @@ static void cas_handle_compat_cpu(PowerPCCPUClass *pcc,
uint32_t pvr,
is206 = (pcc->pcr_supported & PCR_COMPAT_2_06) &&
((lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_06)) ||
(lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_06_PLUS)));
+ is207 = (pcc->pcr_supported & PCR_COMPAT_2_07) &&
+ (lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_07));
- if (is205 || is206) {
+ if (is205 || is206 || is207) {
if (!max_lvl) {
/* User did not set the level, choose the highest */
if (*compat_lvl <= lvl) {
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 274009a..ca894ff 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -9533,6 +9533,9 @@ void ppc_set_compat(PowerPCCPU *cpu, uint32_t
cpu_version, Error **errp)
case CPU_POWERPC_LOGICAL_2_06_PLUS:
env->spr[SPR_PCR] = PCR_TM_DIS | PCR_COMPAT_2_07 | PCR_COMPAT_2_06;
break;
+ case CPU_POWERPC_LOGICAL_2_07:
+ env->spr[SPR_PCR] = PCR_COMPAT_2_07;
+ break;
default:
env->spr[SPR_PCR] = 0;
break;
--
2.5.5
- [Qemu-devel] [PULL 0/8] ppc-for-2.7 queue 20160614, David Gibson, 2016/06/14
- [Qemu-devel] [PULL 1/8] ppc/spapr: Refactor h_client_architecture_support() CPU parsing code, David Gibson, 2016/06/14
- [Qemu-devel] [PULL 3/8] ppc: Provide function to get CPU class of the host CPU, David Gibson, 2016/06/14
- [Qemu-devel] [PULL 7/8] macio: call dma_memory_unmap() at the end of each DMA transfer, David Gibson, 2016/06/14
- [Qemu-devel] [PULL 4/8] ppc: Improve PCR bit selection in ppc_set_compat(), David Gibson, 2016/06/14
- [Qemu-devel] [PULL 6/8] Add PowerPC AT_HWCAP2 definitions, David Gibson, 2016/06/14
- [Qemu-devel] [PULL 5/8] ppc: Add PowerISA 2.07 compatibility mode,
David Gibson <=
- [Qemu-devel] [PULL 2/8] ppc: Split pcr_mask settings into supported bits and the register mask, David Gibson, 2016/06/14
- [Qemu-devel] [PULL 8/8] spapr: Ensure all LMBs are represented in ibm, dynamic-memory, David Gibson, 2016/06/14
- Re: [Qemu-devel] [PULL 0/8] ppc-for-2.7 queue 20160614, Peter Maydell, 2016/06/14