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[Qemu-devel] [PULL 19/22] target-arm/machine.c: Allow user to request GI
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 19/22] target-arm/machine.c: Allow user to request GICv3 emulation |
Date: |
Fri, 17 Jun 2016 15:25:49 +0100 |
Now we have an emulated GICv3, remove the restriction in
gicv3_class_name() so that the user can request a GICv3 with
-machine gic-version=3 even when not using KVM.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Shannon Zhao <address@hidden>
Tested-by: Shannon Zhao <address@hidden>
Message-id: address@hidden
---
target-arm/machine.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target-arm/machine.c b/target-arm/machine.c
index 2f45260..2dbeb82 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -342,8 +342,7 @@ const char *gicv3_class_name(void)
"platform");
#endif
} else {
- /* TODO: Software emulation is not implemented yet */
- error_report("KVM is currently required for GICv3 emulation");
+ return "arm-gicv3";
}
exit(1);
--
1.9.1
- [Qemu-devel] [PULL 04/22] target-arm: Provide hook to tell GICv3 about changes of security state, (continued)
- [Qemu-devel] [PULL 04/22] target-arm: Provide hook to tell GICv3 about changes of security state, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 05/22] target-arm: Add mp-affinity property for ARM CPU class, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 07/22] hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 01/22] migration: Define VMSTATE_UINT64_2DARRAY, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 02/22] bitops.h: Implement half-shuffle and half-unshuffle ops, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 08/22] hw/intc/arm_gicv3: Add vmstate descriptors, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 12/22] hw/intc/arm_gicv3: Implement GICv3 redistributor registers, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 06/22] hw/intc/arm_gicv3: Add state information, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 09/22] hw/intc/arm_gicv3: ARM GICv3 device framework, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 13/22] hw/intc/arm_gicv3: Wire up distributor and redistributor MMIO regions, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 19/22] target-arm/machine.c: Allow user to request GICv3 emulation,
Peter Maydell <=
- [Qemu-devel] [PULL 16/22] hw/intc/arm_gicv3: Implement gicv3_cpuif_update(), Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 11/22] hw/intc/arm_gicv3: Implement GICv3 distributor registers, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 22/22] ACPI: ARM: Present GIC version in MADT table, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 21/22] hw/timer: Add value matching support to aspeed_timer, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 15/22] hw/intc/arm_gicv3: Implement GICv3 CPU interface registers, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 20/22] target-arm/monitor.c: Advertise emulated GICv3 in capabilities, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 18/22] hw/intc/arm_gicv3: Add IRQ handling CPU interface registers, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 14/22] hw/intc/arm_gicv3: Implement gicv3_set_irq(), Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 10/22] hw/intc/arm_gicv3: Implement functions to identify next pending irq, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 17/22] hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers, Peter Maydell, 2016/06/17