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[Qemu-devel] [PATCH v8 10/12] target-avr: saving sreg, rampD, rampX, ram
From: |
Michael Rolnik |
Subject: |
[Qemu-devel] [PATCH v8 10/12] target-avr: saving sreg, rampD, rampX, rampY, rampD, eind in HW representation saving cpu features |
Date: |
Sat, 18 Jun 2016 22:55:41 +0300 |
Signed-off-by: Michael Rolnik <address@hidden>
---
target-avr/cpu-qom.h | 2 +-
target-avr/cpu.c | 2 +-
target-avr/machine.c | 107 ++++++++++++++++++++++++++++++++++++++++-----------
3 files changed, 87 insertions(+), 24 deletions(-)
diff --git a/target-avr/cpu-qom.h b/target-avr/cpu-qom.h
index bf588ca..c5d4f92 100644
--- a/target-avr/cpu-qom.h
+++ b/target-avr/cpu-qom.h
@@ -70,7 +70,7 @@ static inline AVRCPU *avr_env_get_cpu(CPUAVRState *env)
#define ENV_OFFSET offsetof(AVRCPU, env)
#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_avr_cpu;
+extern const struct VMStateDescription vms_avr_cpu;
#endif
void avr_cpu_do_interrupt(CPUState *cpu);
diff --git a/target-avr/cpu.c b/target-avr/cpu.c
index 197f9ac..64e6f57 100644
--- a/target-avr/cpu.c
+++ b/target-avr/cpu.c
@@ -187,7 +187,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
cc->handle_mmu_fault = avr_cpu_handle_mmu_fault;
#else
cc->get_phys_page_debug = avr_cpu_get_phys_page_debug;
- cc->vmsd = &vmstate_avr_cpu;
+ cc->vmsd = &vms_avr_cpu;
#endif
cc->disas_set_info = avr_cpu_disas_set_info;
cc->synchronize_from_tb = avr_cpu_synchronize_from_tb;
diff --git a/target-avr/machine.c b/target-avr/machine.c
index 39f1ee6..13e10db 100644
--- a/target-avr/machine.c
+++ b/target-avr/machine.c
@@ -23,31 +23,94 @@
#include "cpu.h"
#include "hw/boards.h"
#include "machine.h"
+#include "migration/qemu-file.h"
-const VMStateDescription vmstate_avr_cpu = {
+static int get_sreg(QEMUFile *f, void *opaque, size_t size)
+{
+ CPUAVRState *env = opaque;
+ uint8_t sreg;
+
+ qemu_get_8s(f, &sreg);
+ cpu_set_sreg(env, sreg);
+ return 0;
+}
+
+static void put_sreg(QEMUFile *f, void *opaque, size_t size)
+{
+ CPUAVRState *env = opaque;
+ uint8_t sreg = cpu_get_sreg(env);
+
+ qemu_put_8s(f, &sreg);
+}
+
+static const VMStateInfo vms_sreg = {
+ .name = "sreg",
+ .get = get_sreg,
+ .put = put_sreg,
+};
+
+static int get_segment(QEMUFile *f, void *opaque, size_t size)
+{
+ uint32_t *ramp = opaque;
+ uint8_t temp = *ramp >> 16;
+
+ qemu_get_8s(f, &temp);
+ return 0;
+}
+
+static void put_segment(QEMUFile *f, void *opaque, size_t size)
+{
+ uint32_t *ramp = opaque;
+ uint8_t temp;
+
+ qemu_put_8s(f, &temp);
+ *ramp = ((uint32_t)temp) << 16;
+}
+
+static const VMStateInfo vms_rampD = {
+ .name = "rampD",
+ .get = get_segment,
+ .put = put_segment,
+};
+static const VMStateInfo vms_rampX = {
+ .name = "rampX",
+ .get = get_segment,
+ .put = put_segment,
+};
+static const VMStateInfo vms_rampY = {
+ .name = "rampY",
+ .get = get_segment,
+ .put = put_segment,
+};
+static const VMStateInfo vms_rampZ = {
+ .name = "rampZ",
+ .get = get_segment,
+ .put = put_segment,
+};
+static const VMStateInfo vms_eind = {
+ .name = "eind",
+ .get = get_segment,
+ .put = put_segment,
+};
+
+const VMStateDescription vms_avr_cpu = {
.name = "cpu",
- .version_id = 1,
- .minimum_version_id = 1,
+ .version_id = 0,
+ .minimum_version_id = 0,
.fields = (VMStateField[]) {
- VMSTATE_UINT32_ARRAY(r, CPUAVRState, 32),
-
- VMSTATE_UINT32(sregC, CPUAVRState),
- VMSTATE_UINT32(sregZ, CPUAVRState),
- VMSTATE_UINT32(sregN, CPUAVRState),
- VMSTATE_UINT32(sregV, CPUAVRState),
- VMSTATE_UINT32(sregS, CPUAVRState),
- VMSTATE_UINT32(sregH, CPUAVRState),
- VMSTATE_UINT32(sregT, CPUAVRState),
- VMSTATE_UINT32(sregI, CPUAVRState),
-
- VMSTATE_UINT32(rampD, CPUAVRState),
- VMSTATE_UINT32(rampX, CPUAVRState),
- VMSTATE_UINT32(rampY, CPUAVRState),
- VMSTATE_UINT32(rampZ, CPUAVRState),
-
- VMSTATE_UINT32(eind, CPUAVRState),
- VMSTATE_UINT32(sp, CPUAVRState),
- VMSTATE_UINT32(pc_w, CPUAVRState),
+ VMSTATE_UINT32(env.features, AVRCPU),
+ VMSTATE_UINT32(env.pc_w, AVRCPU),
+ VMSTATE_UINT32(env.sp, AVRCPU),
+
+ VMSTATE_UINT32_ARRAY(env.r, AVRCPU, 32),
+ VMSTATE_UINT32_ARRAY(env.io, AVRCPU, 64),
+
+ VMSTATE_SINGLE_TEST(env, AVRCPU, NULL, 0, vms_sreg, CPUAVRState),
+ VMSTATE_SINGLE_TEST(env.rampD, AVRCPU, NULL, 0, vms_rampD, uint32_t),
+ VMSTATE_SINGLE_TEST(env.rampX, AVRCPU, NULL, 0, vms_rampX, uint32_t),
+ VMSTATE_SINGLE_TEST(env.rampY, AVRCPU, NULL, 0, vms_rampY, uint32_t),
+ VMSTATE_SINGLE_TEST(env.rampZ, AVRCPU, NULL, 0, vms_rampZ, uint32_t),
+ VMSTATE_SINGLE_TEST(env.eind, AVRCPU, NULL, 0, vms_eind, uint32_t),
VMSTATE_END_OF_LIST()
}
--
2.4.9 (Apple Git-60)
- [Qemu-devel] [PATCH v8 00/12] 8bit AVR cores, Michael Rolnik, 2016/06/18
- [Qemu-devel] [PATCH v8 03/12] target-avr: adding a sample AVR board, Michael Rolnik, 2016/06/18
- [Qemu-devel] [PATCH v8 01/12] target-avr: AVR cores support is added. 1. basic CPU structure 2. registers 3. no instructions, Michael Rolnik, 2016/06/18
- [Qemu-devel] [PATCH v8 04/12] target-avr: adding instructions encodings, Michael Rolnik, 2016/06/18
- [Qemu-devel] [PATCH v8 06/12] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions, Michael Rolnik, 2016/06/18
- [Qemu-devel] [PATCH v8 09/12] target-avr: updating translate.c to use instructions translation, Michael Rolnik, 2016/06/18
- [Qemu-devel] [PATCH v8 10/12] target-avr: saving sreg, rampD, rampX, rampY, rampD, eind in HW representation saving cpu features,
Michael Rolnik <=
- [Qemu-devel] [PATCH v8 07/12] target-avr: adding instruction decoder, Michael Rolnik, 2016/06/18
- [Qemu-devel] [PATCH v8 02/12] target-avr: adding AVR CPU features/flavors, Michael Rolnik, 2016/06/18
- [Qemu-devel] [PATCH v8 12/12] target-avr: adding maintainer, Michael Rolnik, 2016/06/18
- [Qemu-devel] [PATCH v8 11/12] target-avr: decoder generator. currently not used by the build, can be used manually, Michael Rolnik, 2016/06/18
- [Qemu-devel] [PATCH v8 08/12] target-avr: adding instruction translation, Michael Rolnik, 2016/06/18
- [Qemu-devel] [PATCH v8 05/12] target-avr: adding AVR interrupt handling, Michael Rolnik, 2016/06/18
- Re: [Qemu-devel] [PATCH v8 00/12] 8bit AVR cores, Richard Henderson, 2016/06/19