[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v2 10/14] ICH9 LPC: handle GSI as qdev GPIO
From: |
Efimov Vasily |
Subject: |
[Qemu-devel] [PATCH v2 10/14] ICH9 LPC: handle GSI as qdev GPIO |
Date: |
Wed, 22 Jun 2016 15:24:54 +0300 |
The ICH9 LPC bridge has 24 output IRQs connected to GSI. Currently the IRQs are
referenced by pointers. The pointers are initialized at startup by direct access
to the structure fields. This violates Qemu device model.
The patch makes the IRQs handling to use GPIO model.
Signed-off-by: Efimov Vasily <address@hidden>
---
hw/i386/pc_q35.c | 6 +++++-
hw/isa/lpc_ich9.c | 3 +++
include/hw/i386/ich9.h | 4 +++-
3 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 67bcede..d3213fd 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -60,6 +60,7 @@ static void pc_q35_init(MachineState *machine)
PCIHostState *phb;
PCIBus *host_bus;
PCIDevice *lpc;
+ DeviceState *lpc_dev;
BusState *idebus[MAX_SATA_PORTS];
ISADevice *rtc_state;
MemoryRegion *system_io = get_system_io();
@@ -190,7 +191,10 @@ static void pc_q35_init(MachineState *machine)
PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
ich9_lpc = ICH9_LPC_DEVICE(lpc);
- ich9_lpc->gsi = gsi;
+ lpc_dev = DEVICE(lpc);
+ for (i = 0; i < GSI_NUM_PINS; i++) {
+ qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, gsi[i]);
+ }
pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
ICH9_LPC_NB_PIRQS);
pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 7703357..36506ec 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -598,6 +598,7 @@ static void ich9_lpc_initfn(Object *obj)
static void ich9_lpc_realize(PCIDevice *d, Error **errp)
{
ICH9LPCState *lpc = ICH9_LPC_DEVICE(d);
+ DeviceState *dev = DEVICE(d);
ISABus *isa_bus;
isa_bus = isa_bus_new(DEVICE(d), get_system_memory(), get_system_io(),
@@ -625,6 +626,8 @@ static void ich9_lpc_realize(PCIDevice *d, Error **errp)
memory_region_add_subregion_overlap(pci_address_space_io(d),
ICH9_RST_CNT_IOPORT, &lpc->rst_cnt_mem,
1);
+
+ qdev_init_gpio_out_named(dev, lpc->gsi, ICH9_GPIO_GSI, GSI_NUM_PINS);
}
static bool ich9_rst_cnt_needed(void *opaque)
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index a09a445..c14490b 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -68,7 +68,7 @@ typedef struct ICH9LPCState {
MemoryRegion rcrb_mem; /* root complex register block */
Notifier machine_ready;
- qemu_irq *gsi;
+ qemu_irq gsi[GSI_NUM_PINS];
} ICH9LPCState;
Object *ich9_lpc_find(void);
@@ -176,6 +176,8 @@ Object *ich9_lpc_find(void);
#define ICH9_LPC_PIC_NUM_PINS 16
#define ICH9_LPC_IOAPIC_NUM_PINS 24
+#define ICH9_GPIO_GSI "gsi"
+
/* D31:F2 SATA Controller #1 */
#define ICH9_SATA1_DEV 31
#define ICH9_SATA1_FUNC 2
--
2.7.4
- [Qemu-devel] [PATCH v2 00/14] Make Q35 devices closer to Qemu object model., Efimov Vasily, 2016/06/22
- [Qemu-devel] [PATCH v2 01/14] ide: move headers to include folder, Efimov Vasily, 2016/06/22
- [Qemu-devel] [PATCH v2 03/14] vmport: identify vmport type by macro TYPE_VMPORT, Efimov Vasily, 2016/06/22
- [Qemu-devel] [PATCH v2 11/14] ICH9 LPC: move call of isa_bus_irqs to 'realize' method, Efimov Vasily, 2016/06/22
- [Qemu-devel] [PATCH v2 02/14] pcspk: convert "pit" property type from ptr to link, Efimov Vasily, 2016/06/22
- [Qemu-devel] [PATCH v2 07/14] pckbd: handle A20 IRQ as GPIO, Efimov Vasily, 2016/06/22
- [Qemu-devel] [PATCH v2 04/14] pflash: make TYPE_CFI_PFLASH0{1, 2} macros public, Efimov Vasily, 2016/06/22
- [Qemu-devel] [PATCH v2 14/14] ICH9 LPC: configure PCI IRQs routing internally, Efimov Vasily, 2016/06/22
- [Qemu-devel] [PATCH v2 05/14] Q35: implement property interfece to several parameters, Efimov Vasily, 2016/06/22
- [Qemu-devel] [PATCH v2 08/14] port92: handle A20 IRQ as GPIO, Efimov Vasily, 2016/06/22
- [Qemu-devel] [PATCH v2 10/14] ICH9 LPC: handle GSI as qdev GPIO,
Efimov Vasily <=
- [Qemu-devel] [PATCH v2 12/14] isa: introduce wrapper isa_connect_gpio_out, Efimov Vasily, 2016/06/22
- [Qemu-devel] [PATCH v2 06/14] pc_q35: configure Q35 instance using properties, Efimov Vasily, 2016/06/22
- [Qemu-devel] [PATCH v2 13/14] MC146818 RTC: add GPIO access to output IRQ, Efimov Vasily, 2016/06/22
- [Qemu-devel] [PATCH v2 09/14] ICH9 SMB: make TYPE_ICH9_SMB_DEVICE macro public, Efimov Vasily, 2016/06/22
- Re: [Qemu-devel] [PATCH v2 00/14] Make Q35 devices closer to Qemu object model., Paolo Bonzini, 2016/06/22