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[Qemu-devel] [PULL 04/17] target-ppc: Fix rlwimi, rlwinm, rlwnm again
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 04/17] target-ppc: Fix rlwimi, rlwinm, rlwnm again |
Date: |
Thu, 23 Jun 2016 15:48:33 +1000 |
From: Richard Henderson <address@hidden>
In 63ae0915f8ec, I arranged to use a 32-bit rotate, without
considering the effect of a mask value that wraps around to
the high bits of the word.
[dwg: In 2e11b15 this was partially fixed, but an edge case was still
incorrect, which this fixes]
Signed-off-by: Richard Henderson <address@hidden>
[dwg: Folded with a revert of 2e11b15, an earlier buggy version of
this patch which already went upstream]
Tested-by: Anton Blanchard <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/translate.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 72b67e4..395b885 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -1696,9 +1696,7 @@ static void gen_rlwinm(DisasContext *ctx)
#endif
mask = MASK(mb, me);
- if (sh == 0) {
- tcg_gen_andi_tl(t_ra, t_rs, mask);
- } else if (mask <= 0xffffffffu) {
+ if (mask <= 0xffffffffu) {
TCGv_i32 t0 = tcg_temp_new_i32();
tcg_gen_trunc_tl_i32(t0, t_rs);
tcg_gen_rotli_i32(t0, t0, sh);
--
2.5.5
- [Qemu-devel] [PULL 09/17] ppc: fix exception model for HV mode, (continued)
- [Qemu-devel] [PULL 09/17] ppc: fix exception model for HV mode, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 05/17] ppc: Improve emulation of THRM registers, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 11/17] ppc: Fix generation if ISI/DSI vs. HV mode, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 14/17] ppc: Turn a bunch of booleans from int to bool, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 08/17] ppc: define a default LPCR value, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 15/17] ppc: Move exception generation code out of line, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 12/17] ppc: Rework generation of priv and inval interrupts, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 10/17] ppc: Fix POWER7 and POWER8 exception definitions, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 16/17] ppc: Add P7/P8 Power Management instructions, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 13/17] ppc: Add real mode CI load/store instructions for P7 and P8, David Gibson, 2016/06/23
- [Qemu-devel] [PULL 04/17] target-ppc: Fix rlwimi, rlwinm, rlwnm again,
David Gibson <=
- Re: [Qemu-devel] [PULL 00/17] ppc-for-2.7 queue 20160623, Peter Maydell, 2016/06/23