Re: [Qemu-devel] [PATCH v8 7/8] dma: Add Xilinx Zynq devcfg device model

[Alistair Francis]

On Mon, Jun 27, 2016 at 7:34 AM, Peter Maydell <address@hidden> wrote:
> On 24 June 2016 at 16:42, Alistair Francis <address@hidden> wrote:
>> Add a minimal model for the devcfg device which is part of Zynq.
>> This model supports DMA capabilities and interrupt generation.
>>
>> Signed-off-by: Peter Crosthwaite <address@hidden>
>> Signed-off-by: Alistair Francis <address@hidden>
>> ---
>
>> +REG32(CFG, 0x08)
>> +    FIELD(CFG,      RFIFO_TH,           10,  2)
>> +    FIELD(CFG,      WFIFO_TH,            8,  2)
>> +    FIELD(CFG,      RCLK_EDGE,           7,  1)
>> +    FIELD(CFG,      WCLK_EDGE,           6,  1)
>> +    FIELD(CFG,      DISABLE_SRC_INC,     5,  1)
>> +    FIELD(CFG,      DISABLE_DST_INC,     4,  1)
>> +#define R_CFG_RESET 0x50B
>> +
>> +REG32(INT_STS, 0x0C)
>> +    FIELD(INT_STS,  PSS_GTS_USR_B,      31,  1)
>> +    FIELD(INT_STS,  PSS_FST_CFG_B,      30,  1)
>> +    FIELD(INT_STS,  PSS_CFG_RESET_B,    27,  1)
>> +    FIELD(INT_STS,  RX_FIFO_OV,         18,  1)
>> +    FIELD(INT_STS,  WR_FIFO_LVL,        17,  1)
>> +    FIELD(INT_STS,  RD_FIFO_LVL,        16,  1)
>> +    FIELD(INT_STS,  DMA_CMD_ERR,        15,  1)
>> +    FIELD(INT_STS,  DMA_Q_OV,           14,  1)
>> +    FIELD(INT_STS,  DMA_DONE,           13,  1)
>> +    FIELD(INT_STS,  DMA_P_DONE,         12,  1)
>> +    FIELD(INT_STS,  P2D_LEN_ERR,        11,  1)
>> +    FIELD(INT_STS,  PCFG_DONE,           2,  1)
>> +    #define R_INT_STS_RSVD       ((0x7 << 24) | (0x1 << 19) | (0xF < 7))
>
> Consistency about #define indentation would be nice
> (my vote is for "don't indent").

I removed all of the indentation for the #defines.

>
> Otherwise
> Reviewed-by: Peter Maydell <address@hidden>

Thanks!

Alistair

>
> thanks
> -- PMM
>