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[Qemu-devel] [PULL 11/23] register: Define REG and FIELD macros
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 11/23] register: Define REG and FIELD macros |
Date: |
Mon, 4 Jul 2016 13:22:42 +0100 |
From: Peter Crosthwaite <address@hidden>
Define some macros that can be used for defining registers and fields.
The REG32 macro will define A_FOO, for the byte address of a register
as well as R_FOO for the uint32_t[] register number (A_FOO / 4).
The FIELD macro will define FOO_BAR_MASK, FOO_BAR_SHIFT and
FOO_BAR_LENGTH constants for field BAR in register FOO.
Finally, there are some shorthand helpers for extracting/depositing
fields from registers based on these naming schemes.
Usage can greatly reduce the verbosity of device code.
The deposit and extract macros (eg FIELD_EX32, FIELD_DP32 etc.) can be
used to generate extract and deposits without any repetition of the name
stems.
Signed-off-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Alistair Francis <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
[ EI Changes:
* Add Deposit macros
]
Signed-off-by: Edgar E. Iglesias <address@hidden>
Signed-off-by: Alistair Francis <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
include/hw/register.h | 46 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/include/hw/register.h b/include/hw/register.h
index 00bbfe5..e8c58a1 100644
--- a/include/hw/register.h
+++ b/include/hw/register.h
@@ -152,4 +152,50 @@ void register_write_memory(void *opaque, hwaddr addr,
uint64_t value,
uint64_t register_read_memory(void *opaque, hwaddr addr, unsigned size);
+/* Define constants for a 32 bit register */
+
+/* This macro will define A_FOO, for the byte address of a register
+ * as well as R_FOO for the uint32_t[] register number (A_FOO / 4).
+ */
+#define REG32(reg, addr) \
+ enum { A_ ## reg = (addr) }; \
+ enum { R_ ## reg = (addr) / 4 };
+
+/* Define SHIFT, LENGTH and MASK constants for a field within a register */
+
+/* This macro will define FOO_BAR_MASK, FOO_BAR_SHIFT and FOO_BAR_LENGTH
+ * constants for field BAR in register FOO.
+ */
+#define FIELD(reg, field, shift, length) \
+ enum { R_ ## reg ## _ ## field ## _SHIFT = (shift)}; \
+ enum { R_ ## reg ## _ ## field ## _LENGTH = (length)}; \
+ enum { R_ ## reg ## _ ## field ## _MASK = \
+ MAKE_64BIT_MASK(shift, length)};
+
+/* Extract a field from a register */
+#define FIELD_EX32(storage, reg, field) \
+ extract32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
+ R_ ## reg ## _ ## field ## _LENGTH)
+
+/* Extract a field from an array of registers */
+#define ARRAY_FIELD_EX32(regs, reg, field) \
+ FIELD_EX32((regs)[R_ ## reg], reg, field)
+
+/* Deposit a register field.
+ * Assigning values larger then the target field will result in
+ * compilation warnings.
+ */
+#define FIELD_DP32(storage, reg, field, val) ({ \
+ struct { \
+ unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
+ } v = { .v = val }; \
+ uint32_t d; \
+ d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
+ R_ ## reg ## _ ## field ## _LENGTH, v.v); \
+ d; })
+
+/* Deposit a field to array of registers. */
+#define ARRAY_FIELD_DP32(regs, reg, field, val) \
+ (regs)[R_ ## reg] = FIELD_DP32((regs)[R_ ## reg], reg, field, val);
+
#endif
--
1.9.1
- [Qemu-devel] [PULL 00/23] target-arm queue, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 16/23] ssi: change ssi_slave_init to be a realize ops, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 08/23] bitops: Add MAKE_64BIT_MASK macro, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 13/23] register: Add block initialise helper, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 11/23] register: Define REG and FIELD macros,
Peter Maydell <=
- [Qemu-devel] [PULL 10/23] register: Add Memory API glue, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 23/23] ast2400: create SPI flash slaves, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 06/23] armv7m_nvic: Use qemu_get_cpu(0) instead of current_cpu, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 07/23] hw/arm/virt: mark the PCIe host controller as DMA coherent in the DT, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 01/23] linux-user: Make semihosting heap/stack fields abi_ulongs, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 21/23] ast2400: add SMC controllers (FMC and SPI), Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 17/23] m25p80: do not put iovec on the stack, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 05/23] memory: Assert that memory_region_init_rom_device() ops aren't NULL, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 19/23] m25p80: change cur_addr to 32 bit integer, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 12/23] register: QOMify, Peter Maydell, 2016/07/04