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[Qemu-devel] [PULL 06/23] armv7m_nvic: Use qemu_get_cpu(0) instead of cu
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 06/23] armv7m_nvic: Use qemu_get_cpu(0) instead of current_cpu |
Date: |
Mon, 4 Jul 2016 13:22:37 +0100 |
From: Andrey Smirnov <address@hidden>
Starting QEMU with -S results in current_cpu containing its initial
value of NULL. It is however possible to connect to such QEMU instance
and query various CPU registers, one example being CPUID, and doing that
results in QEMU segfaulting.
Using qemu_get_cpu(0) seem reasonable enough given that ARMv7M
architecture is a single core architecture.
Signed-off-by: Andrey Smirnov <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/intc/armv7m_nvic.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 890d5d7..06d8db6 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -187,11 +187,11 @@ static uint32_t nvic_readl(nvic_state *s, uint32_t offset)
case 0x1c: /* SysTick Calibration Value. */
return 10000;
case 0xd00: /* CPUID Base. */
- cpu = ARM_CPU(current_cpu);
+ cpu = ARM_CPU(qemu_get_cpu(0));
return cpu->midr;
case 0xd04: /* Interrupt Control State. */
/* VECTACTIVE */
- cpu = ARM_CPU(current_cpu);
+ cpu = ARM_CPU(qemu_get_cpu(0));
val = cpu->env.v7m.exception;
if (val == 1023) {
val = 0;
@@ -222,7 +222,7 @@ static uint32_t nvic_readl(nvic_state *s, uint32_t offset)
val |= (1 << 31);
return val;
case 0xd08: /* Vector Table Offset. */
- cpu = ARM_CPU(current_cpu);
+ cpu = ARM_CPU(qemu_get_cpu(0));
return cpu->env.v7m.vecbase;
case 0xd0c: /* Application Interrupt/Reset Control. */
return 0xfa050000;
@@ -349,7 +349,7 @@ static void nvic_writel(nvic_state *s, uint32_t offset,
uint32_t value)
}
break;
case 0xd08: /* Vector Table Offset. */
- cpu = ARM_CPU(current_cpu);
+ cpu = ARM_CPU(qemu_get_cpu(0));
cpu->env.v7m.vecbase = value & 0xffffff80;
break;
case 0xd0c: /* Application Interrupt/Reset Control. */
--
1.9.1
- [Qemu-devel] [PULL 00/23] target-arm queue, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 16/23] ssi: change ssi_slave_init to be a realize ops, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 08/23] bitops: Add MAKE_64BIT_MASK macro, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 13/23] register: Add block initialise helper, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 11/23] register: Define REG and FIELD macros, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 10/23] register: Add Memory API glue, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 23/23] ast2400: create SPI flash slaves, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 06/23] armv7m_nvic: Use qemu_get_cpu(0) instead of current_cpu,
Peter Maydell <=
- [Qemu-devel] [PULL 07/23] hw/arm/virt: mark the PCIe host controller as DMA coherent in the DT, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 01/23] linux-user: Make semihosting heap/stack fields abi_ulongs, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 21/23] ast2400: add SMC controllers (FMC and SPI), Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 17/23] m25p80: do not put iovec on the stack, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 05/23] memory: Assert that memory_region_init_rom_device() ops aren't NULL, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 19/23] m25p80: change cur_addr to 32 bit integer, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 12/23] register: QOMify, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 03/23] memory: Provide memory_region_init_rom(), Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 02/23] target-arm/arm-semi.c: Fix SYS_HEAPINFO for 64-bit guests, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 20/23] m25p80: qdev-ify drive property, Peter Maydell, 2016/07/04