Re: [Qemu-devel] [PATCH 6/9] Convert cpu_memory_rw_debug to use MMUAccessType

[David Gibson]

On Thu, Jul 07, 2016 at 04:33:40PM -0700, Andrey Smirnov wrote:
> Convert cpu_memory_rw_debug() to use MMUAccessType as a way of
> specifying memory reads/writes. This makes caller code be more obvious
> in what it does (previously one had to interpret 0 or 1 and remember the
> semantics of the last boolean argument of the function) and uses the
> same approach used by tlb_* functions.
> 
> Signed-off-by: Andrey Smirnov <address@hidden>

My only concern here is that the constants are named
*MMU*_DATA_... whereas these are physical memory accesses not
involving the MMU.  I can't actually see any current users of
MMUAccessType which makes me a bit confused as to what it's intended
meaning was.

> ---
>  cpus.c                      |  2 +-
>  disas.c                     |  4 ++--
>  exec.c                      | 14 ++++++++++----
>  gdbstub.c                   |  3 ++-
>  hw/i386/kvmvapic.c          | 20 +++++++++++---------
>  include/exec/cpu-all.h      |  2 +-
>  include/exec/softmmu-semi.h | 16 ++++++++--------
>  monitor.c                   |  3 ++-
>  target-arm/arm-semi.c       |  2 +-
>  target-arm/kvm64.c          | 12 ++++++++----
>  target-i386/helper.c        |  7 ++++---
>  target-i386/kvm.c           |  9 +++++----
>  target-ppc/kvm.c            |  9 +++++----
>  target-s390x/kvm.c          |  9 +++++----
>  target-sparc/mmu_helper.c   |  8 ++++++--
>  target-xtensa/xtensa-semi.c | 10 +++++-----
>  16 files changed, 76 insertions(+), 54 deletions(-)
> 
> diff --git a/cpus.c b/cpus.c
> index 84c3520..7aa984b 100644
> --- a/cpus.c
> +++ b/cpus.c
> @@ -1691,7 +1691,7 @@ void qmp_memsave(int64_t addr, int64_t size, const char 
> *filename,
>          l = sizeof(buf);
>          if (l > size)
>              l = size;
> -        if (cpu_memory_rw_debug(cpu, addr, buf, l, 0) != 0) {
> +        if (cpu_memory_rw_debug(cpu, addr, buf, l, MMU_DATA_LOAD) != 0) {
>              error_setg(errp, "Invalid addr 0x%016" PRIx64 "/size %" PRId64
>                               " specified", orig_addr, orig_size);
>              goto exit;
> diff --git a/disas.c b/disas.c
> index 05a7a12..75cae10 100644
> --- a/disas.c
> +++ b/disas.c
> @@ -39,7 +39,7 @@ target_read_memory (bfd_vma memaddr,
>  {
>      CPUDebug *s = container_of(info, CPUDebug, info);
>  
> -    cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
> +    cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, MMU_DATA_LOAD);
>      return 0;
>  }
>  
> @@ -358,7 +358,7 @@ monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, 
> int length,
>      if (monitor_disas_is_physical) {
>          cpu_physical_memory_read(memaddr, myaddr, length);
>      } else {
> -        cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
> +        cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, MMU_DATA_LOAD);
>      }
>      return 0;
>  }
> diff --git a/exec.c b/exec.c
> index 5cef9fe..36a66e6 100644
> --- a/exec.c
> +++ b/exec.c
> @@ -2436,13 +2436,16 @@ MemoryRegion *get_system_io(void)
>  /* physical memory access (slow version, mainly for debug) */
>  #if defined(CONFIG_USER_ONLY)
>  int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
> -                        void *b, int len, int is_write)
> +                        void *b, int len, MMUAccessType access_type)
>  {
>      int l, flags;
>      target_ulong page;
>      void * p;
>      uint8_t *buf = b;
>  
> +    g_assert(access_type == MMU_DATA_STORE ||
> +             access_type == MMU_DATA_LOAD);
> +
>      while (len > 0) {
>          page = addr & TARGET_PAGE_MASK;
>          l = (page + TARGET_PAGE_SIZE) - addr;
> @@ -2451,7 +2454,7 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong 
> addr,
>          flags = page_get_flags(page);
>          if (!(flags & PAGE_VALID))
>              return -1;
> -        if (is_write) {
> +        if (access_type == MMU_DATA_STORE) {
>              if (!(flags & PAGE_WRITE))
>                  return -1;
>              /* XXX: this code should not depend on lock_user */
> @@ -3610,13 +3613,16 @@ void stq_be_phys(AddressSpace *as, hwaddr addr, 
> uint64_t val)
>  
>  /* virtual memory access for debug (includes writing to ROM) */
>  int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
> -                        void *b, int len, int is_write)
> +                        void *b, int len, MMUAccessType access_type)
>  {
>      int l;
>      hwaddr phys_addr;
>      target_ulong page;
>      uint8_t *buf = b;
>  
> +    g_assert(access_type == MMU_DATA_STORE ||
> +             access_type == MMU_DATA_LOAD);
> +
>      while (len > 0) {
>          int asidx;
>          MemTxAttrs attrs;
> @@ -3631,7 +3637,7 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong 
> addr,
>          if (l > len)
>              l = len;
>          phys_addr += (addr & ~TARGET_PAGE_MASK);
> -        if (is_write) {
> +        if (access_type == MMU_DATA_STORE) {
>              cpu_physical_memory_write_rom(cpu->cpu_ases[asidx].as,
>                                            phys_addr, buf, l);
>          } else {
> diff --git a/gdbstub.c b/gdbstub.c
> index 5da66f1..89cb538 100644
> --- a/gdbstub.c
> +++ b/gdbstub.c
> @@ -51,7 +51,8 @@ static inline int target_memory_rw_debug(CPUState *cpu, 
> target_ulong addr,
>      if (cc->memory_rw_debug) {
>          return cc->memory_rw_debug(cpu, addr, buf, len, is_write);
>      }
> -    return cpu_memory_rw_debug(cpu, addr, buf, len, is_write);
> +    return cpu_memory_rw_debug(cpu, addr, buf, len,
> +                               is_write ? MMU_DATA_STORE : MMU_DATA_LOAD);
>  }
>  
>  enum {
> diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
> index c684675..68f87c8 100644
> --- a/hw/i386/kvmvapic.c
> +++ b/hw/i386/kvmvapic.c
> @@ -233,7 +233,7 @@ static int evaluate_tpr_instruction(VAPICROMState *s, 
> X86CPU *cpu,
>                  continue;
>              }
>              if (cpu_memory_rw_debug(cs, ip - instr->length, opcode,
> -                                    sizeof(opcode), 0) < 0) {
> +                                    sizeof(opcode), MMU_DATA_LOAD) < 0) {
>                  return -1;
>              }
>              if (opcode_matches(opcode, instr)) {
> @@ -243,7 +243,8 @@ static int evaluate_tpr_instruction(VAPICROMState *s, 
> X86CPU *cpu,
>          }
>          return -1;
>      } else {
> -        if (cpu_memory_rw_debug(cs, ip, opcode, sizeof(opcode), 0) < 0) {
> +        if (cpu_memory_rw_debug(cs, ip, opcode,
> +                                sizeof(opcode), MMU_DATA_LOAD) < 0) {
>              return -1;
>          }
>          for (i = 0; i < ARRAY_SIZE(tpr_instr); i++) {
> @@ -262,7 +263,7 @@ instruction_ok:
>       */
>      if (cpu_memory_rw_debug(cs, ip + instr->addr_offset,
>                              &real_tpr_addr,
> -                            sizeof(real_tpr_addr), 0) < 0) {
> +                            sizeof(real_tpr_addr), MMU_DATA_LOAD) < 0) {
>          return -1;
>      }
>      real_tpr_addr = le32_to_cpu(real_tpr_addr);
> @@ -349,7 +350,7 @@ static int get_kpcr_number(X86CPU *cpu)
>      } QEMU_PACKED kpcr;
>  
>      if (cpu_memory_rw_debug(CPU(cpu), env->segs[R_FS].base,
> -                            &kpcr, sizeof(kpcr), 0) < 0 ||
> +                            &kpcr, sizeof(kpcr), MMU_DATA_LOAD) < 0 ||
>          kpcr.self != env->segs[R_FS].base) {
>          return -1;
>      }
> @@ -378,7 +379,7 @@ static int vapic_enable(VAPICROMState *s, X86CPU *cpu)
>  
>  static void patch_byte(X86CPU *cpu, target_ulong addr, uint8_t byte)
>  {
> -    cpu_memory_rw_debug(CPU(cpu), addr, &byte, 1, 1);
> +    cpu_memory_rw_debug(CPU(cpu), addr, &byte, 1, MMU_DATA_STORE);
>  }
>  
>  static void patch_call(VAPICROMState *s, X86CPU *cpu, target_ulong ip,
> @@ -388,7 +389,8 @@ static void patch_call(VAPICROMState *s, X86CPU *cpu, 
> target_ulong ip,
>  
>      offset = cpu_to_le32(target - ip - 5);
>      patch_byte(cpu, ip, 0xe8); /* call near */
> -    cpu_memory_rw_debug(CPU(cpu), ip + 1, &offset, sizeof(offset), 1);
> +    cpu_memory_rw_debug(CPU(cpu), ip + 1, &offset,
> +                        sizeof(offset), MMU_DATA_STORE);
>  }
>  
>  static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip)
> @@ -415,7 +417,7 @@ static void patch_instruction(VAPICROMState *s, X86CPU 
> *cpu, target_ulong ip)
>  
>      pause_all_vcpus();
>  
> -    cpu_memory_rw_debug(cs, ip, opcode, sizeof(opcode), 0);
> +    cpu_memory_rw_debug(cs, ip, opcode, sizeof(opcode), MMU_DATA_LOAD);
>  
>      switch (opcode[0]) {
>      case 0x89: /* mov r32 to r/m32 */
> @@ -434,8 +436,8 @@ static void patch_instruction(VAPICROMState *s, X86CPU 
> *cpu, target_ulong ip)
>          break;
>      case 0xc7: /* mov imm32, r/m32 (c7/0) */
>          patch_byte(cpu, ip, 0x68);  /* push imm32 */
> -        cpu_memory_rw_debug(cs, ip + 6, &imm32, sizeof(imm32), 0);
> -        cpu_memory_rw_debug(cs, ip + 1, &imm32, sizeof(imm32), 1);
> +        cpu_memory_rw_debug(cs, ip + 6, &imm32, sizeof(imm32), 
> MMU_DATA_LOAD);
> +        cpu_memory_rw_debug(cs, ip + 1, &imm32, sizeof(imm32), 
> MMU_DATA_STORE);
>          patch_call(s, cpu, ip + 5, handlers->set_tpr);
>          break;
>      case 0xff: /* push r/m32 */
> diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
> index 2b2f38a..062cc52 100644
> --- a/include/exec/cpu-all.h
> +++ b/include/exec/cpu-all.h
> @@ -302,6 +302,6 @@ void dump_opcount_info(FILE *f, fprintf_function 
> cpu_fprintf);
>  #endif /* !CONFIG_USER_ONLY */
>  
>  int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
> -                        void *buf, int len, int is_write);
> +                        void *buf, int len, MMUAccessType access_type);
>  
>  #endif /* CPU_ALL_H */
> diff --git a/include/exec/softmmu-semi.h b/include/exec/softmmu-semi.h
> index 98e5b5c..65d933e 100644
> --- a/include/exec/softmmu-semi.h
> +++ b/include/exec/softmmu-semi.h
> @@ -13,7 +13,7 @@ static inline uint64_t softmmu_tget64(CPUArchState *env, 
> target_ulong addr)
>  {
>      uint64_t val;
>  
> -    cpu_memory_rw_debug(ENV_GET_CPU(env), addr, &val, 8, 0);
> +    cpu_memory_rw_debug(ENV_GET_CPU(env), addr, &val, 8, MMU_DATA_LOAD);
>      return tswap64(val);
>  }
>  
> @@ -21,7 +21,7 @@ static inline uint32_t softmmu_tget32(CPUArchState *env, 
> target_ulong addr)
>  {
>      uint32_t val;
>  
> -    cpu_memory_rw_debug(ENV_GET_CPU(env), addr, &val, 4, 0);
> +    cpu_memory_rw_debug(ENV_GET_CPU(env), addr, &val, 4, MMU_DATA_LOAD);
>      return tswap32(val);
>  }
>  
> @@ -29,7 +29,7 @@ static inline uint32_t softmmu_tget8(CPUArchState *env, 
> target_ulong addr)
>  {
>      uint8_t val;
>  
> -    cpu_memory_rw_debug(ENV_GET_CPU(env), addr, &val, 1, 0);
> +    cpu_memory_rw_debug(ENV_GET_CPU(env), addr, &val, 1, MMU_DATA_LOAD);
>      return val;
>  }
>  
> @@ -42,14 +42,14 @@ static inline void softmmu_tput64(CPUArchState *env,
>                                    target_ulong addr, uint64_t val)
>  {
>      val = tswap64(val);
> -    cpu_memory_rw_debug(ENV_GET_CPU(env), addr, &val, 8, 1);
> +    cpu_memory_rw_debug(ENV_GET_CPU(env), addr, &val, 8, MMU_DATA_STORE);
>  }
>  
>  static inline void softmmu_tput32(CPUArchState *env,
>                                    target_ulong addr, uint32_t val)
>  {
>      val = tswap32(val);
> -    cpu_memory_rw_debug(ENV_GET_CPU(env), addr, &val, 4, 1);
> +    cpu_memory_rw_debug(ENV_GET_CPU(env), addr, &val, 4, MMU_DATA_STORE);
>  }
>  #define put_user_u64(arg, p) ({ softmmu_tput64(env, p, arg) ; 0; })
>  #define put_user_u32(arg, p) ({ softmmu_tput32(env, p, arg) ; 0; })
> @@ -62,7 +62,7 @@ static void *softmmu_lock_user(CPUArchState *env,
>      /* TODO: Make this something that isn't fixed size.  */
>      p = malloc(len);
>      if (p && copy) {
> -        cpu_memory_rw_debug(ENV_GET_CPU(env), addr, p, len, 0);
> +        cpu_memory_rw_debug(ENV_GET_CPU(env), addr, p, len, MMU_DATA_LOAD);
>      }
>      return p;
>  }
> @@ -78,7 +78,7 @@ static char *softmmu_lock_user_string(CPUArchState *env, 
> target_ulong addr)
>          return NULL;
>      }
>      do {
> -        cpu_memory_rw_debug(ENV_GET_CPU(env), addr, &c, 1, 0);
> +        cpu_memory_rw_debug(ENV_GET_CPU(env), addr, &c, 1, MMU_DATA_LOAD);
>          addr++;
>          *(p++) = c;
>      } while (c);
> @@ -89,7 +89,7 @@ static void softmmu_unlock_user(CPUArchState *env, void *p, 
> target_ulong addr,
>                                  target_ulong len)
>  {
>      if (len) {
> -        cpu_memory_rw_debug(ENV_GET_CPU(env), addr, p, len, 1);
> +        cpu_memory_rw_debug(ENV_GET_CPU(env), addr, p, len, MMU_DATA_STORE);
>      }
>      free(p);
>  }
> diff --git a/monitor.c b/monitor.c
> index a27e115..e622d9b 100644
> --- a/monitor.c
> +++ b/monitor.c
> @@ -1268,7 +1268,8 @@ static void memory_dump(Monitor *mon, int count, int 
> format, int wsize,
>          if (is_physical) {
>              cpu_physical_memory_read(addr, buf, l);
>          } else {
> -            if (cpu_memory_rw_debug(mon_get_cpu(), addr, buf, l, 0) < 0) {
> +            if (cpu_memory_rw_debug(mon_get_cpu(), addr, buf,
> +                                    l, MMU_DATA_LOAD) < 0) {
>                  monitor_printf(mon, " Cannot access memory\n");
>                  break;
>              }
> diff --git a/target-arm/arm-semi.c b/target-arm/arm-semi.c
> index 03c959d..42a2856 100644
> --- a/target-arm/arm-semi.c
> +++ b/target-arm/arm-semi.c
> @@ -187,7 +187,7 @@ static void arm_semi_flen_cb(CPUState *cs, target_ulong 
> ret, target_ulong err)
>      /* The size is always stored in big-endian order, extract
>         the value. We assume the size always fit in 32 bits.  */
>      uint32_t size;
> -    cpu_memory_rw_debug(cs, arm_flen_buf(cpu) + 32, &size, 4, 0);
> +    cpu_memory_rw_debug(cs, arm_flen_buf(cpu) + 32, &size, 4, MMU_DATA_LOAD);
>      size = be32_to_cpu(size);
>      if (is_a64(env)) {
>          env->xregs[0] = size;
> diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
> index 7ba5acd..ed324fd 100644
> --- a/target-arm/kvm64.c
> +++ b/target-arm/kvm64.c
> @@ -874,8 +874,10 @@ static const uint32_t brk_insn = 0xd4200000;
>  int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp)
>  {
>      if (have_guest_debug) {
> -        if (cpu_memory_rw_debug(cs, bp->pc, &bp->saved_insn, 4, 0) ||
> -            cpu_memory_rw_debug(cs, bp->pc, &brk_insn, 4, 1)) {
> +        if (cpu_memory_rw_debug(cs, bp->pc, &bp->saved_insn,
> +                                4, MMU_DATA_LOAD) ||
> +            cpu_memory_rw_debug(cs, bp->pc, &brk_insn,
> +                                4, MMU_DATA_STORE)) {
>              return -EINVAL;
>          }
>          return 0;
> @@ -890,9 +892,11 @@ int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct 
> kvm_sw_breakpoint *bp)
>      static uint32_t brk;
>  
>      if (have_guest_debug) {
> -        if (cpu_memory_rw_debug(cs, bp->pc, &brk, 4, 0) ||
> +        if (cpu_memory_rw_debug(cs, bp->pc, &brk,
> +                                4, MMU_DATA_LOAD) ||
>              brk != brk_insn ||
> -            cpu_memory_rw_debug(cs, bp->pc, &bp->saved_insn, 4, 1)) {
> +            cpu_memory_rw_debug(cs, bp->pc, &bp->saved_insn,
> +                                4, MMU_DATA_STORE)) {
>              return -EINVAL;
>          }
>          return 0;
> diff --git a/target-i386/helper.c b/target-i386/helper.c
> index 6b10a8e..7f176fa 100644
> --- a/target-i386/helper.c
> +++ b/target-i386/helper.c
> @@ -555,7 +555,8 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, 
> fprintf_function cpu_fprintf,
>  
>          cpu_fprintf(f, "Code=");
>          for (i = 0; i < DUMP_CODE_BYTES_TOTAL; i++) {
> -            if (cpu_memory_rw_debug(cs, base - offs + i, &code, 1, 0) == 0) {
> +            if (cpu_memory_rw_debug(cs, base - offs + i, &code,
> +                                    1, MMU_DATA_LOAD) == 0) {
>                  snprintf(codestr, sizeof(codestr), "%02x", code);
>              } else {
>                  snprintf(codestr, sizeof(codestr), "??");
> @@ -1286,8 +1287,8 @@ int cpu_x86_get_descr_debug(CPUX86State *env, unsigned 
> int selector,
>      index = selector & ~7;
>      ptr = dt->base + index;
>      if ((index + 7) > dt->limit
> -        || cpu_memory_rw_debug(cs, ptr, &e1, sizeof(e1), 0) != 0
> -        || cpu_memory_rw_debug(cs, ptr+4, &e2, sizeof(e2), 0) != 0)
> +        || cpu_memory_rw_debug(cs, ptr, &e1, sizeof(e1), MMU_DATA_LOAD) != 0
> +        || cpu_memory_rw_debug(cs, ptr+4, &e2, sizeof(e2), MMU_DATA_LOAD) != 
> 0)
>          return 0;
>  
>      *base = ((e1 >> 16) | ((e2 & 0xff) << 16) | (e2 & 0xff000000));
> diff --git a/target-i386/kvm.c b/target-i386/kvm.c
> index dc0cf6b..beefcf4 100644
> --- a/target-i386/kvm.c
> +++ b/target-i386/kvm.c
> @@ -2866,8 +2866,8 @@ int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct 
> kvm_sw_breakpoint *bp)
>  {
>      uint8_t int3 = 0xcc;
>  
> -    if (cpu_memory_rw_debug(cs, bp->pc, &bp->saved_insn, 1, 0) ||
> -        cpu_memory_rw_debug(cs, bp->pc, &int3, 1, 1)) {
> +    if (cpu_memory_rw_debug(cs, bp->pc, &bp->saved_insn, 1, MMU_DATA_LOAD) ||
> +        cpu_memory_rw_debug(cs, bp->pc, &int3, 1, MMU_DATA_STORE)) {
>          return -EINVAL;
>      }
>      return 0;
> @@ -2877,8 +2877,9 @@ int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct 
> kvm_sw_breakpoint *bp)
>  {
>      uint8_t int3;
>  
> -    if (cpu_memory_rw_debug(cs, bp->pc, &int3, 1, 0) || int3 != 0xcc ||
> -        cpu_memory_rw_debug(cs, bp->pc, &bp->saved_insn, 1, 1)) {
> +    if (cpu_memory_rw_debug(cs, bp->pc, &int3, 1, MMU_DATA_LOAD) ||
> +        int3 != 0xcc ||
> +        cpu_memory_rw_debug(cs, bp->pc, &bp->saved_insn, 1, MMU_DATA_STORE)) 
> {
>          return -EINVAL;
>      }
>      return 0;
> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> index efa257b..0a6032a 100644
> --- a/target-ppc/kvm.c
> +++ b/target-ppc/kvm.c
> @@ -1433,8 +1433,8 @@ int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct 
> kvm_sw_breakpoint *bp)
>      uint32_t sc = debug_inst_opcode;
>  
>      if (cpu_memory_rw_debug(cs, bp->pc, &bp->saved_insn,
> -                            sizeof(sc), 0) ||
> -        cpu_memory_rw_debug(cs, bp->pc, &sc, sizeof(sc), 1)) {
> +                            sizeof(sc), MMU_DATA_LOAD) ||
> +        cpu_memory_rw_debug(cs, bp->pc, &sc, sizeof(sc), MMU_DATA_STORE)) {
>          return -EINVAL;
>      }
>  
> @@ -1445,10 +1445,11 @@ int kvm_arch_remove_sw_breakpoint(CPUState *cs, 
> struct kvm_sw_breakpoint *bp)
>  {
>      uint32_t sc;
>  
> -    if (cpu_memory_rw_debug(cs, bp->pc, &sc, sizeof(sc), 0) ||
> +    if (cpu_memory_rw_debug(cs, bp->pc, &sc,
> +                            sizeof(sc), MMU_DATA_LOAD) ||
>          sc != debug_inst_opcode ||
>          cpu_memory_rw_debug(cs, bp->pc, &bp->saved_insn,
> -                            sizeof(sc), 1)) {
> +                            sizeof(sc), MMU_DATA_STORE)) {
>          return -EINVAL;
>      }
>  
> diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
> index fb7dd55..c55d853 100644
> --- a/target-s390x/kvm.c
> +++ b/target-s390x/kvm.c
> @@ -672,9 +672,9 @@ int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct 
> kvm_sw_breakpoint *bp)
>  {
>  
>      if (cpu_memory_rw_debug(cs, bp->pc, &bp->saved_insn,
> -                            sizeof(diag_501), 0) ||
> +                            sizeof(diag_501), MMU_DATA_LOAD) ||
>          cpu_memory_rw_debug(cs, bp->pc, diag_501,
> -                            sizeof(diag_501), 1)) {
> +                            sizeof(diag_501), MMU_DATA_STORE)) {
>          return -EINVAL;
>      }
>      return 0;
> @@ -684,12 +684,13 @@ int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct 
> kvm_sw_breakpoint *bp)
>  {
>      uint8_t t[sizeof(diag_501)];
>  
> -    if (cpu_memory_rw_debug(cs, bp->pc, t, sizeof(diag_501), 0)) {
> +    if (cpu_memory_rw_debug(cs, bp->pc, t,
> +                            sizeof(diag_501), MMU_DATA_LOAD)) {
>          return -EINVAL;
>      } else if (memcmp(t, diag_501, sizeof(diag_501))) {
>          return -EINVAL;
>      } else if (cpu_memory_rw_debug(cs, bp->pc, &bp->saved_insn,
> -                                   sizeof(diag_501), 1)) {
> +                                   sizeof(diag_501), MMU_DATA_STORE)) {
>          return -EINVAL;
>      }
>  
> diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c
> index 32b629f..1cf7c99 100644
> --- a/target-sparc/mmu_helper.c
> +++ b/target-sparc/mmu_helper.c
> @@ -398,7 +398,10 @@ int sparc_cpu_memory_rw_debug(CPUState *cs, vaddr 
> address,
>              /* Handle access before this window.  */
>              if (addr < fp) {
>                  len1 = fp - addr;
> -                if (cpu_memory_rw_debug(cs, addr, buf, len1, is_write) != 0) 
> {
> +                if (cpu_memory_rw_debug(cs, addr, buf, len1,
> +                                        is_write ?
> +                                        MMU_DATA_STORE :
> +                                        MMU_DATA_LOAD) != 0) {
>                      return -1;
>                  }
>                  addr += len1;
> @@ -434,7 +437,8 @@ int sparc_cpu_memory_rw_debug(CPUState *cs, vaddr address,
>              }
>          }
>      }
> -    return cpu_memory_rw_debug(cs, addr, buf, len, is_write);
> +    return cpu_memory_rw_debug(cs, addr, buf, len,
> +                               is_write ? MMU_DATA_STORE : MMU_DATA_LOAD);
>  }
>  
>  #else /* !TARGET_SPARC64 */
> diff --git a/target-xtensa/xtensa-semi.c b/target-xtensa/xtensa-semi.c
> index ec199ac..161a5e0 100644
> --- a/target-xtensa/xtensa-semi.c
> +++ b/target-xtensa/xtensa-semi.c
> @@ -202,7 +202,7 @@ void HELPER(simcall)(CPUXtensaState *env)
>  
>              for (i = 0; i < ARRAY_SIZE(name); ++i) {
>                  rc = cpu_memory_rw_debug(cs, regs[3] + i,
> -                                         &name[i], 1, 0);
> +                                         &name[i], 1, MMU_DATA_LOAD);
>                  if (rc != 0 || name[i] == 0) {
>                      break;
>                  }
> @@ -246,8 +246,8 @@ void HELPER(simcall)(CPUXtensaState *env)
>              FD_SET(fd, &fdset);
>  
>              if (target_tv) {
> -                cpu_memory_rw_debug(cs, target_tv,
> -                                    target_tvv, sizeof(target_tvv), 0);
> +                cpu_memory_rw_debug(cs, target_tv, target_tvv,
> +                                    sizeof(target_tvv), MMU_DATA_LOAD);
>                  tv.tv_sec = (int32_t)tswap32(target_tvv[0]);
>                  tv.tv_usec = (int32_t)tswap32(target_tvv[1]);
>              }
> @@ -281,8 +281,8 @@ void HELPER(simcall)(CPUXtensaState *env)
>              };
>  
>              argv.argptr[0] = tswap32(regs[3] + offsetof(struct Argv, text));
> -            cpu_memory_rw_debug(cs,
> -                                regs[3], &argv, sizeof(argv), 1);
> +            cpu_memory_rw_debug(cs, regs[3], &argv,
> +                                sizeof(argv), MMU_DATA_STORE);
>          }
>          break;
>  

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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