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Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations


From: Mark Cave-Ayland
Subject: Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations
Date: Mon, 11 Jul 2016 19:30:08 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Icedove/45.1.0

On 11/07/16 02:55, David Gibson wrote:

> On Sat, Jul 09, 2016 at 01:41:31PM +1000, Benjamin Herrenschmidt wrote:
>> MacOS uses an architecturally illegal MSR combination that
>> seems nonetheless supported by 32-bit processors, which is
>> to have MSR[PR]=1 and one or more of MSR[DR/IR/EE]=0.
>>
>> This adds support for it. To work properly we need to also
>> properly include support for PR=1,{I,D}R=0 to the MMU index
>> used by the qemu TLB.
>>
>> Signed-off-by: Benjamin Herrenschmidt <address@hidden>
> 
> Applied to ppc-for-2.7, thanks.

Hi David,

I can't see this in the ppc-for-2.7 branch on github - does it need a push?


ATB,

Mark.




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