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Re: [Qemu-devel] [PATCH v1 0/4] Connect the Xilinx ZynqMP IPI device
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v1 0/4] Connect the Xilinx ZynqMP IPI device |
Date: |
Mon, 11 Jul 2016 23:25:36 +0100 |
On 11 July 2016 at 22:56, Alistair Francis <address@hidden> wrote:
> I still think this is helpful as there are a large number of cases
> where setting a bit in a register propagates through the system to
> somewhere else. We use this functionality to control the VINITI pin
> for the R5 in our tree and many other use cases where it is very
> helpful to directly map a bit to the GPIO line.
Well, there are some devices like that. But I think:
* most devices aren't like that
* most GPIO lines are more complicated than "just follows
a register bit"
* most devices that do have GPIO lines don't have very
many and it's not very complicated to just implement
them by open coding them
* a special case facility that only gets used for the
rare situation is going to make those devices harder
to understand and maintain because they do things in
a different way to everything else
> Is there any chance I can convince you that this is useful and
> get it merged?
It doesn't seem very likely, I'm afraid.
thanks
-- PMM
- [Qemu-devel] [PATCH v1 0/4] Connect the Xilinx ZynqMP IPI device, Alistair Francis, 2016/07/05
- [Qemu-devel] [PATCH v1 1/4] irq: Add opaque setter routine, Alistair Francis, 2016/07/05
- [Qemu-devel] [PATCH v1 2/4] register: Add GPIO API, Alistair Francis, 2016/07/05
- [Qemu-devel] [PATCH v1 4/4] zynqmp: Connect the IPI devices, Alistair Francis, 2016/07/05
- [Qemu-devel] [PATCH v1 3/4] xlnx-zynqmp-ipi: Add the IPI device, Alistair Francis, 2016/07/05
- Re: [Qemu-devel] [PATCH v1 0/4] Connect the Xilinx ZynqMP IPI device, Peter Maydell, 2016/07/05