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Re: [Qemu-devel] [PATCH v3 01/19] target-i386: cpu: use uint32_t for X86


From: Igor Mammedov
Subject: Re: [Qemu-devel] [PATCH v3 01/19] target-i386: cpu: use uint32_t for X86CPU.apic_id
Date: Thu, 14 Jul 2016 10:10:17 +0200

On Wed, 13 Jul 2016 18:13:59 -0400
Bandan Das <address@hidden> wrote:

> I know some of these have already been pulled. I just have some minor
> questions/comments that shouldn't conflict.
> 
> Igor Mammedov <address@hidden> writes:
> 
> > Redo 9886e834 (target-i386: Require APIC ID to be explicitly set before
> > CPU realize) in another way that doesn't use int64_t to detect
> > if apic-id property has been set.
> >
> > Use the fact that 0xFFFFFFFF is the broadcast  
> 
> I noticed this was UINT32_MAX in v2. Why is UINT32_MAX
> not appropriate ?
mst requested it to be explicit 0xFFFFFFFF

> 
> > value that a CPU can't have and set default
> > uint32_t apic_id to it instead of using int64_t.
> >
> > Later uint32_t apic_id will be used to drop custom
> > property setter/getter in favor of static property.
> >
> > Signed-off-by: Igor Mammedov <address@hidden>
> > ---
> >  target-i386/cpu.c | 4 ++--
> >  target-i386/cpu.h | 7 ++++++-
> >  2 files changed, 8 insertions(+), 3 deletions(-)
> >
> > diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> > index 5c69c43..e7319e3 100644
> > --- a/target-i386/cpu.c
> > +++ b/target-i386/cpu.c
> > @@ -2883,7 +2883,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error 
> > **errp)
> >          goto out;
> >      }
> >  
> > -    if (cpu->apic_id < 0) {
> > +    if (cpu->apic_id == UNASSIGNED_APIC_ID) {
> >          error_setg(errp, "apic-id property was not initialized properly");
> >          return;
> >      }
> > @@ -3154,7 +3154,7 @@ static void x86_cpu_initfn(Object *obj)
> >  
> >  #ifndef CONFIG_USER_ONLY
> >      /* Any code creating new X86CPU objects have to set apic-id explicitly 
> > */
> > -    cpu->apic_id = -1;
> > +    cpu->apic_id = UNASSIGNED_APIC_ID;
> >  #endif
> >  
> >      for (w = 0; w < FEATURE_WORDS; w++) {
> > diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> > index 738958e..00de199 100644
> > --- a/target-i386/cpu.h
> > +++ b/target-i386/cpu.h
> > @@ -835,6 +835,11 @@ typedef struct {
> >  
> >  #define NB_OPMASK_REGS 8
> >  
> > +/* CPU can't have 0xFFFFFFFF APIC ID, use that value to distinguish
> > + * that APIC ID hasn't been set yet
> > + */
> > +#define UNASSIGNED_APIC_ID 0xFFFFFFFF
> > +
> >  typedef union X86LegacyXSaveArea {
> >      struct {
> >          uint16_t fcw;
> > @@ -1163,7 +1168,7 @@ struct X86CPU {
> >      bool expose_kvm;
> >      bool migratable;
> >      bool host_features;
> > -    int64_t apic_id;
> > +    uint32_t apic_id;
> >  
> >      /* if true the CPUID code directly forward host cache leaves to the 
> > guest */
> >      bool cache_info_passthrough;  




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