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[Qemu-devel] [PATCH v4 00/14] tcg: Add support for fence generation
From: |
Pranith Kumar |
Subject: |
[Qemu-devel] [PATCH v4 00/14] tcg: Add support for fence generation |
Date: |
Thu, 14 Jul 2016 16:20:12 -0400 |
Hello,
The following series adds fence instruction generation support to
TCG. Based on feedback to the last series, I added the four
combinations of orderings modeled after Sparc membar.
This has been tested and confirmed to fix ordering issues on
x86/armv7/aarch64 hosts with MTTCG enabled for an ARMv7 guest using
KVM unit tests. It has also been tested with litmus tests provided by
Alex Bennée.
TODO:
* The acquire/release order is not utilized yet. Currently we generate
SC barriers even for acquire/release barriers. The idea is to write
a pass which combines acquire/release barrier with its corresponding
load/store operation to generate the load acquire/store release
instruction on hosts which have such instruction(aarch64 for
now).
v4:
- Update with comments from v3
- Use 'lock orl' instead of mfence on x86. Remove sse2 checks.
- Rebase on qemu/master instead of MTTCG
- Rename acquire barrier to load-acquire and release to store-release
to avoid confusion with prevailing terminology
v3:
- Create different types of barriers. The barrier tcg opcode now takes
an argument to generate the appropriate barrier instruction.
- Also add acquire/release/sc ordering flag to argument.
v2:
- Rebase on Richard's patches generating fences for other
architectures.
v1:
- Initial version: Introduce memory barrier tcg opcode.
Pranith Kumar (14):
Introduce TCGOpcode for memory barrier
tcg/i386: Add support for fence
tcg/aarch64: Add support for fence
tcg/arm: Add support for fence
tcg/ia64: Add support for fence
tcg/mips: Add support for fence
tcg/ppc: Add support for fence
tcg/s390: Add support for fence
tcg/sparc: Add support for fence
tcg/tci: Add support for fence
target-arm: Generate fences in ARMv7 frontend
target-alpha: Generate fence op
target-aarch64: Generate fences for aarch64
target-i386: Generate fences for x86
target-alpha/translate.c | 4 ++--
target-arm/translate-a64.c | 14 +++++++++++++-
target-arm/translate.c | 4 ++--
target-i386/translate.c | 8 ++++++++
tcg/README | 17 +++++++++++++++++
tcg/aarch64/tcg-target.inc.c | 26 ++++++++++++++++++++++++++
tcg/arm/tcg-target.inc.c | 18 ++++++++++++++++++
tcg/i386/tcg-target.inc.c | 18 ++++++++++++++++++
tcg/ia64/tcg-target.inc.c | 5 +++++
tcg/mips/tcg-target.inc.c | 6 ++++++
tcg/ppc/tcg-target.inc.c | 22 ++++++++++++++++++++++
tcg/s390/tcg-target.inc.c | 11 +++++++++++
tcg/sparc/tcg-target.inc.c | 25 +++++++++++++++++++++++++
tcg/tcg-op.c | 17 +++++++++++++++++
tcg/tcg-op.h | 2 ++
tcg/tcg-opc.h | 2 ++
tcg/tcg.h | 19 +++++++++++++++++++
tcg/tci/tcg-target.inc.c | 3 +++
tci.c | 4 ++++
19 files changed, 220 insertions(+), 5 deletions(-)
--
2.9.0
- [Qemu-devel] [PATCH v4 00/14] tcg: Add support for fence generation,
Pranith Kumar <=
- [Qemu-devel] [PATCH v4 02/14] tcg/i386: Add support for fence, Pranith Kumar, 2016/07/14
- [Qemu-devel] [PATCH v4 01/14] Introduce TCGOpcode for memory barrier, Pranith Kumar, 2016/07/14
- [Qemu-devel] [PATCH v4 05/14] tcg/ia64: Add support for fence, Pranith Kumar, 2016/07/14
- [Qemu-devel] [PATCH v4 03/14] tcg/aarch64: Add support for fence, Pranith Kumar, 2016/07/14
- [Qemu-devel] [PATCH v4 07/14] tcg/ppc: Add support for fence, Pranith Kumar, 2016/07/14
- [Qemu-devel] [PATCH v4 08/14] tcg/s390: Add support for fence, Pranith Kumar, 2016/07/14
- [Qemu-devel] [PATCH v4 06/14] tcg/mips: Add support for fence, Pranith Kumar, 2016/07/14
- [Qemu-devel] [PATCH v4 04/14] tcg/arm: Add support for fence, Pranith Kumar, 2016/07/14
- [Qemu-devel] [PATCH v4 09/14] tcg/sparc: Add support for fence, Pranith Kumar, 2016/07/14
- [Qemu-devel] [PATCH v4 10/14] tcg/tci: Add support for fence, Pranith Kumar, 2016/07/14