Re: [Qemu-devel] [RFC v1 12/13] target-ppc: add maddhd and maddhdu instruction

[Richard Henderson]

On 07/18/2016 10:35 PM, Nikunj A Dadhania wrote:
> +        tcg_gen_movi_i64(t2, -1);
> +        tcg_gen_movcond_i64(TCG_COND_GE, t2, cpu_gpr[rC(ctx->opcode)], zero, 
> zero, neg);

This is a simple sign-extension of rC.  Better as

  tcg_gen_sari_i64(t2, cpu_gpr[rC(ctx->opcode)], 63);

> +    tcg_gen_mov_i64(t1, zero);
> +    tcg_gen_add2_i64(t1, cpu_gpr[rD(ctx->opcode)], lo, hi, 
> cpu_gpr[rC(ctx->opcode)], t2);

Pointless store of t1.

Indeed, since we're discarding the value of t1, you might as well re-use t2 in 
the output and drop the t1 variable altogether.  And, thus, rename t2 to 
something else.  ;-)



r~