Re: [Qemu-devel] [PATCH 1/1] ppc: Fix MMU model values needed by PR KVM

[Mark Cave-Ayland]

On 21/07/16 06:55, Sam Bobroff wrote:

> Commit 4322e8c "ppc: Fix 64K pages support in full emulation" added
> the POWERPC_MMU_64K flag to the POWERPC_MMU_2_06 and POWERPC_MMU_2_07
> definitions but not to their "degraded" variants. When running with PR
> KVM, kvm_fixup_page_sizes() removes the POWERPC_MMU_1TSEG flag from
> the MMU value then later ppc_tlb_invalidate_all() expects the value to
> be one from the list, but it isn't because the POWERPC_MMU_64K bit is
> missing from the (otherwise) matching "degraded" entry. This causes
> QEMU to exit with "fatal: Unknown MMU model".
> 
> This patch adds the POWERPC_MMU_64K flag to the POWERPC_MMU_2_06a and
> POWERPC_MMU_2_07a values, preventing the error.
> 
> Signed-off-by: Sam Bobroff <address@hidden>
> ---
> I recently discovered that I can't start QEMU with KVM PR for modern
> pseries machines:
> 
> $ rmmod kvm_hv
> $ modprobe kvm-pr
> $ qemu-system-ppc64 -nographic -vga none -machine pseries,accel=kvm
> qemu: fatal: Unknown MMU model
> 
> A quick investigation seems to indicate that it's just a missing flag
> in the MMU definition. If it's really that simple then here's a patch
> for it.
> 
> Cheers,
> Sam.
> 
>  target-ppc/cpu-qom.h | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
> index 2864105..0f1e011 100644
> --- a/target-ppc/cpu-qom.h
> +++ b/target-ppc/cpu-qom.h
> @@ -71,6 +71,10 @@ enum powerpc_mmu_t {
>  #define POWERPC_MMU_1TSEG    0x00020000
>  #define POWERPC_MMU_AMR      0x00040000
>  #define POWERPC_MMU_64K      0x00080000
> +/* Any entry that include POWERPC_MMU_1TSEG must have a matching
> + * entry without it, because it may be removed by
> + * kvm_fixup_page_sizes() and the new value must exist here.
> + * See ppc_tlb_invalidate_*(). */
>      /* 64 bits PowerPC MMU                                     */
>      POWERPC_MMU_64B        = POWERPC_MMU_64 | 0x00000001,
>      /* Architecture 2.03 and later (has LPCR) */
> @@ -81,6 +85,7 @@ enum powerpc_mmu_t {
>                               | POWERPC_MMU_AMR | 0x00000003,
>      /* Architecture 2.06 "degraded" (no 1T segments)           */
>      POWERPC_MMU_2_06a      = POWERPC_MMU_64 | POWERPC_MMU_AMR
> +                             | POWERPC_MMU_64K
>                               | 0x00000003,
>      /* Architecture 2.07 variant                               */
>      POWERPC_MMU_2_07       = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
> @@ -88,6 +93,7 @@ enum powerpc_mmu_t {
>                               | POWERPC_MMU_AMR | 0x00000004,
>      /* Architecture 2.07 "degraded" (no 1T segments)           */
>      POWERPC_MMU_2_07a      = POWERPC_MMU_64 | POWERPC_MMU_AMR
> +                             | POWERPC_MMU_64K
>                               | 0x00000004,
>  };
>  
> 

Added David as CC to make sure it gets caught by a PPC maintainer.


ATB,

Mark.