Re: [Qemu-devel] [Qemu-ppc] [RFC v2 05/13] target-ppc: add modulo word operations

[Nikunj A Dadhania]

Nikunj A Dadhania <address@hidden> writes:

> Richard Henderson <address@hidden> writes:
>
>> On 07/23/2016 02:14 PM, Nikunj A Dadhania wrote:
>> +uint32_t helper_modsw(uint32_t rau, uint32_t rbu)
>>> +{
>>> +    int32_t ra = (int32_t) rau;
>>> +    int32_t rb = (int32_t) rbu;
>>> +
>>> +    if ((rb == 0) || (ra == INT32_MIN && rb == -1)) {
>>> +        return 0;
>>> +    }
>>> +    return ra % rb;
>>> +}
>>> +
>>> +uint32_t helper_moduw(uint32_t ra, uint32_t rb)
>>> +{
>>> +    return rb ? ra % rb : 0;
>>> +}
>>
>> I think, like you, I got distracted by the current div implementation in 
>> ppc. 
>> I've just re-read the spec and seen the "undefined" language.  Which of 
>> course 
>> gives us much more freedom.
>
> Right, I too thought of the same but didn't do it in this series.
> Current div implementation is pretty complicated.

To be precise gen_op_arith_div[d,w]() implementation.

>> With this freedom, we can do the division inline, without branches.  Please 
>> see 
>> target-mips/translate.c, gen_r6_muldiv.
>>
>> Basically, we check for the offending cases and modify the divisor prior to 
>> the 
>> division.  For unsigned:
>>
>>      a / (b == 0 ? 1 : b)
>>
>> For signed:
>>
>>      a / ((a == INT_MAX & b == -1) | (b == 0) ? : b)
>
> Sure, will add it in this series.
>
> Regards
> Nikunj