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[Qemu-devel] GNU ARM Eclipse QEMU: Use BASEPRI to disable interrupts on


From: Liviu Ionescu
Subject: [Qemu-devel] GNU ARM Eclipse QEMU: Use BASEPRI to disable interrupts on Cortex-M
Date: Mon, 25 Jul 2016 15:37:03 +0300

Most of the development of my µOS++ / CMSIS++ RTOS was done on GNU ARM Eclipse 
QEMU and/or as a 64-bits user process on macOS.

However, on QEMU, initially I encountered some strange behaviour when 
configuring the critical sections to use BASEPRI; when using DI/EI everything 
was fine.

These days I took some time to investigate the problem and discovered that the 
BASEPRI register was not used by the NVIC implementation, so implementing 
critical sections with BASEPRI was not effective in QEMU.


Since the current NVIC implementation is a kludge running on top of GIC, and I 
still have on my TOOD list to completely rewrite the NVIC code, for now I just 
further patched the current patches in order to make it work.

If someone is planing to properly implement BASEPRI in QEMU, my patches can be 
used as a starting point. (https://github.com/gnuarmeclipse/qemu/issues/21)

Please note that by default FreeRTOS uses BASEPRI in the Cortex-M3/M4/M7 ports, 
so don't bother to run them on the current QEMU, or you'll encounter problems. 
The next release of GNU ARM Eclipse QEMU will be fine.

Regards,

Liviu







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