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[Qemu-devel] [PATCHv2 13/31] ppc: Don't update NIP in lmw/stmw/icbi
From: |
Benjamin Herrenschmidt |
Subject: |
[Qemu-devel] [PATCHv2 13/31] ppc: Don't update NIP in lmw/stmw/icbi |
Date: |
Wed, 27 Jul 2016 16:56:31 +1000 |
Instead, pass GETPC() result to the corresponding helpers.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
---
target-ppc/mem_helper.c | 11 ++++++-----
target-ppc/translate.c | 6 ------
2 files changed, 6 insertions(+), 11 deletions(-)
diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c
index de96c91..e20a53e 100644
--- a/target-ppc/mem_helper.c
+++ b/target-ppc/mem_helper.c
@@ -57,9 +57,9 @@ void helper_lmw(CPUPPCState *env, target_ulong addr, uint32_t
reg)
{
for (; reg < 32; reg++) {
if (needs_byteswap(env)) {
- env->gpr[reg] = bswap32(cpu_ldl_data(env, addr));
+ env->gpr[reg] = bswap32(cpu_ldl_data_ra(env, addr, GETPC()));
} else {
- env->gpr[reg] = cpu_ldl_data(env, addr);
+ env->gpr[reg] = cpu_ldl_data_ra(env, addr, GETPC());
}
addr = addr_add(env, addr, 4);
}
@@ -69,9 +69,10 @@ void helper_stmw(CPUPPCState *env, target_ulong addr,
uint32_t reg)
{
for (; reg < 32; reg++) {
if (needs_byteswap(env)) {
- cpu_stl_data(env, addr, bswap32((uint32_t)env->gpr[reg]));
+ cpu_stl_data_ra(env, addr, bswap32((uint32_t)env->gpr[reg]),
+ GETPC());
} else {
- cpu_stl_data(env, addr, (uint32_t)env->gpr[reg]);
+ cpu_stl_data_ra(env, addr, (uint32_t)env->gpr[reg], GETPC());
}
addr = addr_add(env, addr, 4);
}
@@ -178,7 +179,7 @@ void helper_icbi(CPUPPCState *env, target_ulong addr)
* (not a fetch) by the MMU. To be sure it will be so,
* do the load "by hand".
*/
- cpu_ldl_data(env, addr);
+ cpu_ldl_data_ra(env, addr, GETPC());
}
/* XXX: to be tested */
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index c32e2be..5e88ee2 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2868,8 +2868,6 @@ static void gen_lmw(DisasContext *ctx)
TCGv t0;
TCGv_i32 t1;
gen_set_access_type(ctx, ACCESS_INT);
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
t0 = tcg_temp_new();
t1 = tcg_const_i32(rD(ctx->opcode));
gen_addr_imm_index(ctx, t0, 0);
@@ -2884,8 +2882,6 @@ static void gen_stmw(DisasContext *ctx)
TCGv t0;
TCGv_i32 t1;
gen_set_access_type(ctx, ACCESS_INT);
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
t0 = tcg_temp_new();
t1 = tcg_const_i32(rS(ctx->opcode));
gen_addr_imm_index(ctx, t0, 0);
@@ -4107,8 +4103,6 @@ static void gen_icbi(DisasContext *ctx)
{
TCGv t0;
gen_set_access_type(ctx, ACCESS_CACHE);
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
t0 = tcg_temp_new();
gen_addr_reg_index(ctx, t0);
gen_helper_icbi(cpu_env, t0);
--
2.7.4
- [Qemu-devel] [PATCHv2 04/31] ppc: Move DFP ops out of translate.c, (continued)
- [Qemu-devel] [PATCHv2 04/31] ppc: Move DFP ops out of translate.c, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 06/31] ppc: Move VSX ops out of translate.c, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 07/31] ppc: Rename fload_invalid_op_excp to float_invalid_op_excp, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 05/31] ppc: Move VMX ops out of translate.c, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 09/31] ppc: Make float_check_status() pass the return address, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 08/31] ppc: Make float_invalid_op_excp() pass the return address, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 10/31] ppc: Don't update the NIP in floating point generated code, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 11/31] ppc: FP exceptions are always precise, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 03/31] ppc: Move embedded spe ops out of translate.c, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 12/31] ppc: Don't update NIP in lswi/lswx/stswi/stswx, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 13/31] ppc: Don't update NIP in lmw/stmw/icbi,
Benjamin Herrenschmidt <=
- [Qemu-devel] [PATCHv2 14/31] ppc: Make tlb_fill() use new exception helper, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 15/31] ppc: Rework NIP updates vs. exception generation, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 16/31] ppc: Fix source NIP on SLB related interrupts, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 17/31] ppc: Don't update NIP in DCR access routines, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 22/31] ppc: Don't update NIP in dcbz and lscbx, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 21/31] ppc: Don't update NIP if not taking alignment exceptions, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 18/31] ppc: Don't update NIP in facility unavailable interrupts, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 19/31] ppc: Don't update NIP BookE 2.06 tlbwe, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 20/31] ppc: Don't update NIP on conditional trap instructions, Benjamin Herrenschmidt, 2016/07/27
- [Qemu-devel] [PATCHv2 23/31] ppc: Make alignment exceptions suck less, Benjamin Herrenschmidt, 2016/07/27