[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v2 0/9] arm: add ast2500 support
From: |
Cédric Le Goater |
Subject: |
[Qemu-devel] [PATCH v2 0/9] arm: add ast2500 support |
Date: |
Thu, 28 Jul 2016 16:28:10 +0200 |
The ast2500 soc being very close to the ast2400 soc, the goal of the
changes below is to modify the existing platform 'palmetto-bmc' and
existing soc 'ast2400' to take into account the small differences and
avoid code duplication. This is mostly inspired by the realview
platform.
First patches rework the 'palmetto-bmc' platform and the 'ast2400' soc
models to provide room to other platforms and socs which have a common
design. Being able to set the 'silicon-rev' and the cpu model are the
primary motivation.
The last patches add support for the new ast2500 soc in the required
controller (sdmc and scu) and define a new platform for an Aspeed
evaluation board.
On the ast2500, I am still having a little issue under uboot which
sets the vbar doing :
mcr p15, 0, r0, c12, c0, 0 /* Set VBAR */
and this is trapped as an undefined instruction by qemu.
Looking at hw/arm/helper.c, the VBAR register seems to be defined only
for feature ARM_FEATURE_V7 (v7_cp_reginfo). The ast2500 soc uses a
arm1176 which defines ARM_FEATURE_EL3 which gives us a VBAR_EL3.
According to th specs, the arm1176jzf-s has a Vector Base Address
Register. So am I missing something in the board definition or is
uboot being too optimistic on the cpu features ? This is confusing for
me, some direction would be welcomed :)
A part from that, the soc behaves fine.
Thanks,
Most notable changes in v2 are :
- palmetto_bmc.c file rename
- SCU macros to define the hardware strapping register
Cédric Le Goater (9):
palmetto-bmc: rename file to aspeed.c
palmetto-bmc: add a "silicon-rev" property at the soc level
palmetto-bmc: replace palmetto_bmc with aspeed
ast2400: use machine cpu_model to initialize the soc cpu
palmetto-bmc: add board specific configuration
hw/misc: use macros to define hw-strap1 register on Aspeed SOC
aspeed: add ast2500 support to scu and sdmc controllers
arm: add support for an ast2500 evaluation board
palmetto-bmc: remove extra no_sdcard assignement
hw/arm/Makefile.objs | 2 +-
hw/arm/aspeed.c | 166 +++++++++++++++++++++++++++++++++++++++++++
hw/arm/ast2400.c | 21 ++++--
hw/arm/palmetto-bmc.c | 102 --------------------------
hw/misc/aspeed_scu.c | 45 +++++++++++-
hw/misc/aspeed_sdmc.c | 1 +
include/hw/arm/ast2400.h | 5 ++
include/hw/misc/aspeed_scu.h | 165 ++++++++++++++++++++++++++++++++++++++++++
8 files changed, 397 insertions(+), 110 deletions(-)
create mode 100644 hw/arm/aspeed.c
delete mode 100644 hw/arm/palmetto-bmc.c
--
2.1.4
- [Qemu-devel] [PATCH v2 0/9] arm: add ast2500 support,
Cédric Le Goater <=
- [Qemu-devel] [PATCH v2 1/9] palmetto-bmc: rename file to aspeed.c, Cédric Le Goater, 2016/07/28
- [Qemu-devel] [PATCH v2 2/9] palmetto-bmc: add a "silicon-rev" property at the soc level, Cédric Le Goater, 2016/07/28
- [Qemu-devel] [PATCH v2 3/9] palmetto-bmc: replace palmetto_bmc with aspeed, Cédric Le Goater, 2016/07/28
- [Qemu-devel] [PATCH v2 4/9] ast2400: use machine cpu_model to initialize the soc cpu, Cédric Le Goater, 2016/07/28
- [Qemu-devel] [PATCH v2 5/9] palmetto-bmc: add board specific configuration, Cédric Le Goater, 2016/07/28
- [Qemu-devel] [PATCH v2 6/9] hw/misc: use macros to define hw-strap1 register on Aspeed SOC, Cédric Le Goater, 2016/07/28
- [Qemu-devel] [PATCH v2 7/9] aspeed: add ast2500 support to scu and sdmc controllers, Cédric Le Goater, 2016/07/28
- [Qemu-devel] [PATCH v2 8/9] arm: add support for an ast2500 evaluation board, Cédric Le Goater, 2016/07/28
- [Qemu-devel] [PATCH v2 9/9] palmetto-bmc: remove extra no_sdcard assignement, Cédric Le Goater, 2016/07/28