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Re: [Qemu-devel] [PATCH v15 0/9] 8bit AVR cores


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH v15 0/9] 8bit AVR cores
Date: Tue, 16 Aug 2016 10:43:57 +0100

On 16 August 2016 at 10:18,  <address@hidden> wrote:
> Hi,
>
> Your series seems to have some coding style problems. See output below for
> more information:

Hi Fam, something seems to have gone weird with patchew here:

> Message-id: address@hidden
> Subject: [Qemu-devel] [PATCH v15 0/9] 8bit AVR cores
> Type: series
>
> === TEST SCRIPT BEGIN ===
> #!/bin/bash
>
> BASE=6bbbb0ac136102098a70b97ab0c07bc7bf53131c
> n=1
> total=$(git log --oneline $BASE.. | wc -l)
> failed=0
>
> # Useful git options
> git config --local diff.renamelimit 0
> git config --local diff.renames True
>
> commits="$(git log --format=%H --reverse $BASE..)"
> for c in $commits; do
>     echo "Checking PATCH $n/$total: $(git show --no-patch --format=%s $c)..."
>     if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; 
> then
>         failed=1
>         echo
>     fi
>     n=$((n+1))
> done
>
> exit $failed
> === TEST SCRIPT END ===


Here we correctly add the 9 target-avr patches to the testing branch:

> Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
> From https://github.com/patchew-project/qemu
>  * [new tag]         patchew/address@hidden -> patchew/address@hidden
> Switched to a new branch 'test'
> 4626c6c target-avr: adding instruction decoder
> c7184d0 target-avr: instruction decoder generator
> 4af00d1 target-avr: adding instruction translation
> 96850f5 target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported 
> instructions
> b470a23 target-avr: adding AVR interrupt handling
> cf6b2fc target-avr: adding instructions encodings
> 9a634b8 target-avr: adding a sample AVR board
> 0f08442 target-avr: adding AVR CPU features/flavors
> f7fa439 target-avr: AVR cores support is added.

...but here we seem to be also checking another 10 patches
which are nothing to do with it, and reporting problems with those:

> === OUTPUT BEGIN ===
> Checking PATCH 1/19: trace-events: fix first line comment in trace-events...
> Checking PATCH 2/19: Xen: fix converity warning of xen_pt_config_init()...
> Checking PATCH 3/19: xen: handle inbound migration of VMs without ioreq 
> server pages...
> Checking PATCH 4/19: ppc: parse cpu features once...
> Checking PATCH 5/19: Revert "vhost-user: Attempt to fix a race with 
> set_mem_table."...
> WARNING: line over 80 characters
> #60: FILE: hw/virtio/vhost-user.c:294:
> +            msg.payload.memory.regions[fd_num].userspace_addr = 
> reg->userspace_addr;
>
> WARNING: line over 80 characters
> #62: FILE: hw/virtio/vhost-user.c:296:
> +            msg.payload.memory.regions[fd_num].guest_phys_addr = 
> reg->guest_phys_addr;
>
> total: 0 errors, 2 warnings, 139 lines checked
>
> Your patch has style problems, please review.  If any of these errors
> are false positives report them to the maintainer, see
> CHECKPATCH in MAINTAINERS.
> Checking PATCH 6/19: softfloat: Fix warn about implicit conversion from int 
> to int8_t...
> Checking PATCH 7/19: pc-bios/optionrom: Fix OpenBSD build with better 
> detection of linker emulation...
> Checking PATCH 8/19: Merge remote-tracking branch 
> 'remotes/stefanha/tags/tracing-pull-request' into staging...
> Checking PATCH 9/19: Merge remote-tracking branch 
> 'remotes/sstabellini/tags/xen-20160812-tag-2' into staging...
> Checking PATCH 10/19: Merge remote-tracking branch 
> 'remotes/dgibson/tags/ppc-for-2.7-20160815' into staging...
> Checking PATCH 11/19: target-avr: AVR cores support is added....
> Checking PATCH 12/19: target-avr: adding AVR CPU features/flavors...
> Checking PATCH 13/19: target-avr: adding a sample AVR board...
> Checking PATCH 14/19: target-avr: adding instructions encodings...
> Checking PATCH 15/19: target-avr: adding AVR interrupt handling...
> Checking PATCH 16/19: target-avr: adding helpers for IN, OUT, SLEEP, WBR & 
> unsupported instructions...
> Checking PATCH 17/19: target-avr: adding instruction translation...
> Checking PATCH 18/19: target-avr: instruction decoder generator...
> ERROR: suspect code indent for conditional statements (4, 4)
> #810: FILE: target-avr/cpugen/src/cpugen.cpp:440:
> +    if (argc != 2) {
> [...]
> +    }
>
> total: 1 errors, 0 warnings, 1225 lines checked
>
> Your patch has style problems, please review.  If any of these errors
> are false positives report them to the maintainer, see
> CHECKPATCH in MAINTAINERS.
>
> Checking PATCH 19/19: target-avr: adding instruction decoder...
> === OUTPUT END ===
>
> Test command exited with code: 1

thanks
-- PMM



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