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Re: [Qemu-devel] a quesion


From: Michael Rolnik
Subject: Re: [Qemu-devel] a quesion
Date: Tue, 16 Aug 2016 17:09:30 +0300

thanks Peter.

On Tue, Aug 16, 2016 at 5:07 PM, Peter Maydell <address@hidden>
wrote:

> On 16 August 2016 at 14:53, Michael Rolnik <address@hidden> wrote:
> > 1. How to implement a device that has 4 registers in IO space e.g. AVR
> > EEPROM?
>
> Since for your AVR target the IO space is just turned into
> accesses to physical memory, ie the inb/outb default case
> does something like this:
>
> +            cpu_physical_memory_read(PHYS_BASE_REGS + port
> +                                              + AVR_CPU_IO_REGS_BASE,
> &data, 1);
>
> you don't need to do anything special for the device being
> in IO space. You just need to implement a device which has
> a MemoryRegion which handles its 4 registers, and then
> have the board or SoC create that device and map it into
> the memory space at the right address. hw/misc/zynq_slcr.c
> is perhaps one example of a device that's just some simple
> registers (though it has a lot more than 4, the principles
> are the same).
>
> > 2. what is a SoC container object? How?
>
> An "SoC container" is a device which doesn't have any interesting
> functionality itself, but just creates a lot of other devices
> and maps them to the right places in the address space. A good
> example is hw/arm/fsl-imx6.c.
>
> thanks
> -- PMM
>



-- 
Best Regards,
Michael Rolnik


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