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[Qemu-devel] [PULL 34/66] ppc: Don't update NIP BookE 2.06 tlbwe
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 34/66] ppc: Don't update NIP BookE 2.06 tlbwe |
Date: |
Tue, 6 Sep 2016 13:40:21 +1000 |
From: Benjamin Herrenschmidt <address@hidden>
This is no longer necessary as the helpers will properly retrieve
the return address when needed.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/mmu_helper.c | 12 ++++++------
target-ppc/translate.c | 1 -
2 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index 692398c..696bb03 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -2598,9 +2598,9 @@ void helper_booke206_tlbwe(CPUPPCState *env)
tlb = booke206_cur_tlb(env);
if (!tlb) {
- helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
- POWERPC_EXCP_INVAL |
- POWERPC_EXCP_INVAL_INVAL);
+ raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
+ POWERPC_EXCP_INVAL |
+ POWERPC_EXCP_INVAL_INVAL, GETPC());
}
/* check that we support the targeted size */
@@ -2608,9 +2608,9 @@ void helper_booke206_tlbwe(CPUPPCState *env)
size_ps = booke206_tlbnps(env, tlbn);
if ((env->spr[SPR_BOOKE_MAS1] & MAS1_VALID) && (tlbncfg & TLBnCFG_AVAIL) &&
!(size_ps & (1 << size_tlb))) {
- helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
- POWERPC_EXCP_INVAL |
- POWERPC_EXCP_INVAL_INVAL);
+ raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
+ POWERPC_EXCP_INVAL |
+ POWERPC_EXCP_INVAL_INVAL, GETPC());
}
if (msr_gs) {
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index b62772b..f75cdc6 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -5849,7 +5849,6 @@ static void gen_tlbwe_booke206(DisasContext *ctx)
GEN_PRIV;
#else
CHK_SV;
- gen_update_nip(ctx, ctx->nip - 4);
gen_helper_booke206_tlbwe(cpu_env);
#endif /* defined(CONFIG_USER_ONLY) */
}
--
2.7.4
- [Qemu-devel] [PULL 06/66] target-ppc: add cmprb instruction, (continued)
- [Qemu-devel] [PULL 06/66] target-ppc: add cmprb instruction, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 01/66] xics_kvm: drop extra checking of kernel_xics_fd, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 05/66] target-ppc: adding addpcis instruction, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 11/66] target-ppc: add cmpeqb instruction, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 09/66] target-ppc: add cnttzd[.] instruction, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 10/66] target-ppc: add cnttzw[.] instruction, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 13/66] target-ppc: add maddld instruction, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 15/66] target-ppc: introduce opc4 for Expanded Opcode, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 12/66] target-ppc: add setb instruction, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 16/66] ppc: Provide basic raise_exception_* functions, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 34/66] ppc: Don't update NIP BookE 2.06 tlbwe,
David Gibson <=
- [Qemu-devel] [PULL 24/66] ppc: Make float_check_status() pass the return address, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 36/66] ppc: Don't update NIP if not taking alignment exceptions, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 31/66] ppc: Fix source NIP on SLB related interrupts, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 23/66] ppc: Make float_invalid_op_excp() pass the return address, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 28/66] ppc: Don't update NIP in lmw/stmw/icbi, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 38/66] ppc: Make alignment exceptions suck less, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 19/66] ppc: Move DFP ops out of translate.c, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 03/66] target-ppc: Introduce Power9 family, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 26/66] ppc: FP exceptions are always precise, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 25/66] ppc: Don't update the NIP in floating point generated code, David Gibson, 2016/09/05