Re: [Qemu-devel] [PATCH 3/7] hw/mips_gic: Update pin state on mask changes

[Leon Alrae]

On Fri, Aug 19, 2016 at 08:08:59PM +0100, Paul Burton wrote:
> If the GIC interrupt mask is changed by a write to the smask (set mask)
> or rmask (reset mask) registers, we need to re-evaluate the state of the
> pins/IRQs fed to the CPU. Without doing so we risk leaving a pin high
> despite the interrupt that led to that state being masked, or losing
> interrupts if an already pending interrupt is unmasked.
> 
> Signed-off-by: Paul Burton <address@hidden>
> ---
>  hw/intc/mips_gic.c | 56 
> ++++++++++++++++++++++++++++++------------------------
>  1 file changed, 31 insertions(+), 25 deletions(-)

Reviewed-by: Leon Alrae <address@hidden>