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[Qemu-devel] [PATCH v2 0/8] MIPS Boston board support
From: |
Paul Burton |
Subject: |
[Qemu-devel] [PATCH v2 0/8] MIPS Boston board support |
Date: |
Thu, 8 Sep 2016 15:51:50 +0100 |
This series introduces support for the MIPS Boston development board. It begins
by introducing support for moving MIPS Coherence Manager GCRs which Boston
software typically does to avoid conflicting with its flash memory region. An
API is then added to retrieve the emulated MIPS GIC timer frequency, which is
used to report system clock frequency to software via "platform registers"
which the Boston board provides. An issue with the MIPS GIC that current Boston
Linux kernels encounter is fixed, and an API introduced to allow the board to
determine whether the MIPS CPS hardware is supported.
The last 3 patches are more extensive, providing support for the FIT image
format used with Boston, the Xilinx PCIe controller which Boston boards include
3 of, and finally the Boston board support itself.
This can be tested with either U-Boot or Linux if desired. U-Boot support is
available in the following patchset:
https://www.mail-archive.com/address@hidden/msg221003.html
Linux kernel support can be found as part of the generic kernel patchset:
https://www.linux-mips.org/archives/linux-mips/2016-08/msg00456.html
Hopefully this will be merged for v4.9, but it can also be found in a
downstream kernel from Imagination Technologies in the "eng" branch of:
git://git.linux-mips.org/pub/scm/linux-mti.git
Linux may be built with:
$ make 64r6el_defconfig
$ make
The arch/mips/boot/vmlinux.gz.itb image may then be provided to QEMU's -kernel
argument, for example:
$ qemu-system-mips64el -M boston -kernel vmlinux.gz.itb -serial stdio
Paul Burton (8):
hw/mips_cmgcr: allow GCR base to be moved
hw/mips_gictimer: provide API for retrieving frequency
hw/mips_gic: Update pin state on mask changes
target-mips: Provide function to test if a CPU supports an ISA
dtc: Update requirement to v1.4.2
loader: Support Flattened Image Trees (FIT images)
hw: xilinx-pcie: Add support for Xilinx AXI PCIe Controller
hw/mips: MIPS Boston board support
configure | 8 +-
default-configs/mips-softmmu-common.mak | 2 +
dtc | 2 +-
hw/core/Makefile.objs | 1 +
hw/core/loader-fit.c | 287 +++++++++++++++++
hw/core/loader.c | 3 +-
hw/intc/mips_gic.c | 56 ++--
hw/mips/Makefile.objs | 1 +
hw/mips/boston.c | 526 ++++++++++++++++++++++++++++++++
hw/misc/mips_cmgcr.c | 17 ++
hw/pci-host/Makefile.objs | 1 +
hw/pci-host/xilinx-pcie.c | 310 +++++++++++++++++++
hw/timer/mips_gictimer.c | 5 +
include/hw/loader-fit.h | 41 +++
include/hw/loader.h | 2 +
include/hw/misc/mips_cmgcr.h | 3 +
include/hw/pci-host/xilinx-pcie.h | 102 +++++++
include/hw/timer/mips_gictimer.h | 1 +
target-mips/cpu.h | 1 +
target-mips/translate.c | 10 +
20 files changed, 1347 insertions(+), 32 deletions(-)
create mode 100644 hw/core/loader-fit.c
create mode 100644 hw/mips/boston.c
create mode 100644 hw/pci-host/xilinx-pcie.c
create mode 100644 include/hw/loader-fit.h
create mode 100644 include/hw/pci-host/xilinx-pcie.h
--
2.9.3
- [Qemu-devel] [PATCH v2 0/8] MIPS Boston board support,
Paul Burton <=
- [Qemu-devel] [PATCH v2 1/8] hw/mips_cmgcr: allow GCR base to be moved, Paul Burton, 2016/09/08
- [Qemu-devel] [PATCH v2 2/8] hw/mips_gictimer: provide API for retrieving frequency, Paul Burton, 2016/09/08
- [Qemu-devel] [PATCH v2 3/8] hw/mips_gic: Update pin state on mask changes, Paul Burton, 2016/09/08
- [Qemu-devel] [PATCH v2 4/8] target-mips: Provide function to test if a CPU supports an ISA, Paul Burton, 2016/09/08
- [Qemu-devel] [PATCH v2 5/8] dtc: Update requirement to v1.4.2, Paul Burton, 2016/09/08
- [Qemu-devel] [PATCH v2 6/8] loader: Support Flattened Image Trees (FIT images), Paul Burton, 2016/09/08
- [Qemu-devel] [PATCH v2 7/8] hw: xilinx-pcie: Add support for Xilinx AXI PCIe Controller, Paul Burton, 2016/09/08
- [Qemu-devel] [PATCH v2 8/8] hw/mips: MIPS Boston board support, Paul Burton, 2016/09/08
- Re: [Qemu-devel] [PATCH v2 0/8] MIPS Boston board support, no-reply, 2016/09/08