Re: [Qemu-devel] [PATCH] hw/timer/imx_gpt: Properly mask control register on software reset

[Michael Tokarev]

07.08.2016 09:50, Donny Yang wrote:
> Signed-off-by: Donny Yang <address@hidden>
> ---
>  hw/timer/imx_gpt.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c
> index 82bc73c..02d875f 100644
> --- a/hw/timer/imx_gpt.c
> +++ b/hw/timer/imx_gpt.c
> @@ -306,8 +306,8 @@ static void imx_gpt_reset(DeviceState *dev)
>      /*
>       * Soft reset doesn't touch some bits; hard reset clears them
>       */
> -    s->cr &= ~(GPT_CR_EN|GPT_CR_ENMOD|GPT_CR_STOPEN|GPT_CR_DOZEN|
> -               GPT_CR_WAITEN|GPT_CR_DBGEN);
> +    s->cr &= GPT_CR_EN|GPT_CR_ENMOD|GPT_CR_STOPEN|GPT_CR_DOZEN|
> +             GPT_CR_WAITEN|GPT_CR_DBGEN;
>      s->sr = 0;
>      s->pr = 0;
>      s->ir = 0;

Hello.  Thank you for the patch.

Please don't send html-formatted emails, patch handling software
dislikes it.

And please include qemu-devel@ on all patches, so more people
can review your changes (Cc'd now).

This change, while one-liner, isn't obvious for anoyne who
isn't familiar with the timer code. I for one don't know what
is happening there and hence don't know if this change is ok
or not.

Maybe someone else can confirm this is right thing to do.

Thanks,

/mjt