Re: [Qemu-devel] [PATCH v3 34/34] target-alpha: Emulate LL/SC using cmpxchg helpers

[Richard Henderson]

On 09/15/2016 10:48 AM, Alex Bennée wrote:
> Ahh ok. The ARM code just allocates temps on demand including for its
> zero register which I guess means multiple ones could be assigned. There
> is also temp allocation logic to free them at the end of the block.
>
> I wonder if this is something that should be more of a feature of the
> core TCG code because let's face it temp tracking is a pain.

Yep, sparc and s390 have a similar bit of temp tracking.  It would be nice for 
that to be generic.


> Does the code generator suffer if temps aren't freed as soon as
> possible?  Is there a reason why we don't just do a general free all
> temps at the end of the block?

Freeing temps as quickly as possible means that we minimize the number of temps 
required, and the register allocator has a couple of O(N**2) places, for N == 
number of temps.


r~