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Re: [Qemu-devel] [PATCH RFC v1 00/29] ARC cores
From: |
Michael Rolnik |
Subject: |
Re: [Qemu-devel] [PATCH RFC v1 00/29] ARC cores |
Date: |
Mon, 19 Sep 2016 16:45:23 +0300 |
Hi Igor,
I will try to compile this example and test my implementations.
Thank you,
Michael
On Mon, Sep 19, 2016 at 3:55 PM, Igor Guryanov <address@hidden>
wrote:
> Hi Michael,
>
>
>
> Long time ago debugged one problem with embARC and I remember I was also
> puzzled with itss interrupt handling approach.
>
> The board itself can fit only prebootloader in the ROM, and interrupt
> handling is kept in embARC itself.
>
>
>
> But, the projects is aimed to support several different RTOS. As I
> remember, BSP was separated and made ‘universal’.
> In other words, not very transparent and obvious J. If I recall it there
> were a single entry for interrupt/exceptions which scanned OS defined data
> structure in a search for pointers for actual handlers. i.e. it was very
> different from what you can find in simple baremetal example (like this one
> - https://github.com/foss-for-synopsys-dwc-arc-processors/
> ARC-Development-Systems-Forum/tree/master/examples/EMSK/timer_IRQ )
>
>
>
> Let me refresh my memory on embARC internals which might have already
> evolved and I give you overview in a day or two.
>
>
>
> Regards,
>
> Igor.
>
>
>
> *From:* Alexey Brodkin
> *Sent:* Monday, September 19, 2016 3:41 PM
> *To:* address@hidden
> *Cc:* address@hidden; Igor Guryanov <address@hidden>;
> address@hidden
> *Subject:* Re: [PATCH RFC v1 00/29] ARC cores
>
>
>
> Hi Michael,
>
>
>
> I'm pretty sure embARC was not meant to be run on ARCompact (AKA ISAv1
> cores like ARC600 & ARC700) instead targets were ARCv2 cores like ARC EM
> and ARC HS. Unfortunately I have no experience with embARC so adding more
> experienced person in the thread (Igor Guryanov) who may shed some light on
> interrupts in embARC.
>
>
>
> -Alexey
>
>
>
> On Sat, 2016-09-17 at 21:26 +0300, Michael Rolnik wrote:
>
> H Alexey.
>
>
>
> Thanks.
>
>
>
> I need some help in getting a small code that exercises interrupts. For
> several years I wrote FW for ARC based platforms (ARC4 & ARC6), but it
> seems I forgot some of the things related to interrupts. I compiled
> FreeRTOS demo from embARC, however I could not find interrupt vectors
> there, I assume their board has ROM.
>
> So, if you can help me with such a code, it would be great.
>
>
>
> thanks,
>
> Michael
>
>
>
>
>
>
>
> On Fri, Sep 16, 2016 at 6:01 PM, Alexey Brodkin <
> address@hidden> wrote:
>
> Hi Michael,
>
> On Fri, 2016-09-09 at 01:31 +0300, Michael Rolnik wrote:
> > This series of patches adds ARC target to QEMU. It indends to support
> > - ARCtangent-A5 processor
> > - ARC 600 processor
> > - ARC 700 processor
> >
> > All instructions except ASLS are implemented. Not fully tested yet.
> > However I was able to execute correctly recursive fibonacci calculation.
> > Reset vector is assumed to be some hardcoded value which worked for my
> test.
> > I am planning to get FreeRTOS for ARC, once I get it, I will able to
> verify
> > and complete interrupt support.
>
> That's both very unexpected and cool!
>
> I tried your patches on top of current QEMU git master and it:
> a) Builds for ARC
> b) Very simple code really works!
>
> I was able to single-step with GDB through program as simple as:
> --------------------->8---------------------
> .global _start
> _start:
> mov r0, 1
> mov r1, 2
> mov r1, r0
> --------------------->8---------------------
>
> That's what I saw in GDB:
> --------------------->8---------------------
> (gdb) disassemble
> Dump of assembler code for function _start:
> => 0x00000100 <+0>: mov r0,0x1
> 0x00000104 <+4>: mov r1,0x2
> 0x00000108 <+8>: mov r1,r0
> End of assembler dump.
> (gdb) p $r0
> $1 = 0
> (gdb) stepi
> 0x00000104 in _start ()
> (gdb) p $r0
> $2 = 1
> (gdb) stepi
> 0x00000108 in _start ()
> (gdb) p $r1
> $3 = 2
> (gdb) stepi
> 0x0000010c in ?? ()
> (gdb) p $r1
> $4 = 1
> --------------------->8---------------------
>
> So again this is very promising even though a lot is essentially missing
> from
> this very first implementation.
>
> Anyways IMHO it would be good to have these patches accepted so people may
> start
> playing with that stuff adding missing things one by one.
>
> Let me know if you need any help from my side.
>
> Regards,
> Alexey
>
>
>
>
>
> --
>
> Best Regards,
> Michael Rolnik
>
>
--
Best Regards,
Michael Rolnik
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- [Qemu-devel] [PATCH RFC v1 28/29] target-arc: decode, Michael Rolnik, 2016/09/08
- Re: [Qemu-devel] [PATCH RFC v1 00/29] ARC cores, Alexey Brodkin, 2016/09/16