Re: [Qemu-devel] [PATCH RFC v1 14/29] target-arc: MPY, MPYH, MPYHU, MPYU

[Richard Henderson]

On 09/08/2016 03:31 PM, Michael Rolnik wrote:
> +    tcg_gen_ext_i32_i64(srcA, src1);
> +    tcg_gen_ext_i32_i64(srcB, src2);
> +
> +    tcg_gen_mul_i64(rslt, srcA, srcB);
> +
> +    tcg_gen_trunc_i64_tl(dest, rslt);
> +
> +    if (ctx->opt.f) {
> +        TCGv_i64 temp = tcg_temp_new_i64();
> +
> +        tcg_gen_setcond_tl(TCG_COND_EQ, cpu_Zf, dest, ctx->zero);
> +
> +        tcg_gen_trunc_i64_tl(cpu_Nf, rslt);
> +        tcg_gen_shri_tl(cpu_Nf, cpu_Nf, 31);
> +
> +        tcg_gen_ext_i32_i64(temp, dest);
> +        tcg_gen_setcond_i64(TCG_COND_NE, temp, temp, rslt);
> +        tcg_gen_trunc_i64_tl(cpu_Cf, temp);
> +
> +        tcg_temp_free_i64(temp);
> +    }

It's probably easier to do this with tcg_gen_muls2_tl.


r~