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[Qemu-devel] [PATCH] Add more APIC state to dump
From: |
Dr. David Alan Gilbert (git) |
Subject: |
[Qemu-devel] [PATCH] Add more APIC state to dump |
Date: |
Fri, 23 Sep 2016 18:43:17 +0100 |
From: "Dr. David Alan Gilbert" <address@hidden>
Add the rest of the APIC state to the 'info lapic' dump,
since it is of course state that wasn't printed that I'd
messed up.
You now have output like:
(qemu) info lapic
dumping local APIC state for CPU 1
apicbase 0xfee00c00 ID 1 Version 20
LVT0 0x00010700 active-hi edge masked ExtINT (vec 0)
LVT1 0x00010400 active-hi edge masked NMI
LVTPC 0x00010400 active-hi edge masked NMI
LVTERR 0x000000fe active-hi edge Fixed (vec 254)
LVTTHMR 0x00010000 active-hi edge masked Fixed (vec 0)
LVTT 0x000000ef active-hi edge one-shot Fixed (vec 239)
Timer DCR=0x3 (divide by 16) initial_count=12490894
count_shift=4 iclt=65526002593 next=65725856913 expiry=65725856913
SPIV 0x000001ff APIC enabled, focus=off, spurious vec 255
SIPI vector 0 wait 0
vAPIC control 1 paddr 0x0
ICR 0x000000fd physical edge de-assert no-shorthand
ICR2 0x00000002 cpu 2 (X2APIC ID)
ESR 0x00000000
ISR (none)
IRR (none)
APR 0x00 TPR 0x00 DFR 0x0f LDR 0x00 PPR 0x00
(qemu)
Signed-off-by: Dr. David Alan Gilbert <address@hidden>
---
target-i386/helper.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 1c250b8..769d7df 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -329,6 +329,8 @@ void x86_cpu_dump_local_apic_state(CPUState *cs, FILE *f,
cpu_fprintf(f, "dumping local APIC state for CPU %-2u\n\n",
CPU(cpu)->cpu_index);
+ cpu_fprintf(f, "apicbase 0x%x ID %d Version %d\n", s->apicbase, s->id,
+ s->version);
dump_apic_lvt(f, cpu_fprintf, "LVT0", lvt[APIC_LVT_LINT0], false);
dump_apic_lvt(f, cpu_fprintf, "LVT1", lvt[APIC_LVT_LINT1], false);
dump_apic_lvt(f, cpu_fprintf, "LVTPC", lvt[APIC_LVT_PERFORM], false);
@@ -336,10 +338,14 @@ void x86_cpu_dump_local_apic_state(CPUState *cs, FILE *f,
dump_apic_lvt(f, cpu_fprintf, "LVTTHMR", lvt[APIC_LVT_THERMAL], false);
dump_apic_lvt(f, cpu_fprintf, "LVTT", lvt[APIC_LVT_TIMER], true);
- cpu_fprintf(f, "Timer\t DCR=0x%x (divide by %u) initial_count = %u\n",
+ cpu_fprintf(f, "Timer\t DCR=0x%x (divide by %u) initial_count=%u\n",
s->divide_conf & APIC_DCR_MASK,
divider_conf(s->divide_conf),
s->initial_count);
+ cpu_fprintf(f, " \t count_shift=%d iclt=%" PRId64 " next=%" PRId64
+ " expiry=%" PRId64 "\n",
+ s->count_shift, s->initial_count_load_time,
+ s->next_time, s->timer_expiry);
cpu_fprintf(f, "SPIV\t 0x%08x APIC %s, focus=%s, spurious vec %u\n",
s->spurious_vec,
@@ -347,6 +353,11 @@ void x86_cpu_dump_local_apic_state(CPUState *cs, FILE *f,
s->spurious_vec & APIC_SPURIO_FOCUS ? "on" : "off",
s->spurious_vec & APIC_VECTOR_MASK);
+ cpu_fprintf(f, "SIPI\t vector %d wait %d\n", s->sipi_vector,
+ s->wait_for_sipi);
+ cpu_fprintf(f, "vAPIC\t control %d paddr 0x%" HWADDR_PRIX "\n",
+ s->vapic_control, s->vapic_paddr);
+
dump_apic_icr(f, cpu_fprintf, s, &cpu->env);
cpu_fprintf(f, "ESR\t 0x%08x\n", s->esr);
--
2.7.4
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