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Re: [Qemu-devel] [PATCH v6 26/35] tests: add atomic_add-bench
From: |
Emilio G. Cota |
Subject: |
Re: [Qemu-devel] [PATCH v6 26/35] tests: add atomic_add-bench |
Date: |
Fri, 14 Oct 2016 17:19:36 -0400 |
User-agent: |
Mutt/1.5.24 (2015-08-30) |
On Tue, Oct 11, 2016 at 14:40:52 -0500, Richard Henderson wrote:
> From: "Emilio G. Cota" <address@hidden>
>
> With this microbenchmark we can measure the overhead of emulating atomic
> instructions with a configurable degree of contention.
>
> The benchmark spawns $n threads, each performing $o atomic ops (additions)
> in a loop. Each atomic operation is performed on a different cache line
> (assuming lines are 64b long) that is randomly selected from a range [0, $r).
>
> [ Note: each $foo corresponds to a -foo flag ]
>
> Signed-off-by: Emilio G. Cota <address@hidden>
> Signed-off-by: Richard Henderson <address@hidden>
> Message-Id: <address@hidden>
Can you please fix up this patch with the below? It does the
same as we're doing in qht-bench:
http://lists.nongnu.org/archive/html/qemu-devel/2016-10/msg03034.html
Thanks,
Emilio
commit e3f226e427358778c57a102a3c5e35373f1f98cf
Author: Emilio G. Cota <address@hidden>
Date: Fri Oct 14 17:15:25 2016 -0400
atomic_add-bench: relax test_start/stop atomic accesses
Signed-off-by: Emilio G. Cota <address@hidden>
diff --git a/tests/atomic_add-bench.c b/tests/atomic_add-bench.c
index 69c59ad..caa1e8e 100644
--- a/tests/atomic_add-bench.c
+++ b/tests/atomic_add-bench.c
@@ -50,7 +50,7 @@ static void *thread_func(void *arg)
struct thread_info *info = arg;
atomic_inc(&n_ready_threads);
- while (!atomic_mb_read(&test_start)) {
+ while (!atomic_read(&test_start)) {
cpu_relax();
}
@@ -72,11 +72,11 @@ static void run_test(void)
while (atomic_read(&n_ready_threads) != n_threads) {
cpu_relax();
}
- atomic_mb_set(&test_start, true);
+ atomic_set(&test_start, true);
do {
remaining = sleep(duration);
} while (remaining);
- atomic_mb_set(&test_stop, true);
+ atomic_set(&test_stop, true);
for (i = 0; i < n_threads; i++) {
qemu_thread_join(&threads[i]);
- [Qemu-devel] [PATCH v6 17/35] target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers, (continued)
- [Qemu-devel] [PATCH v6 17/35] target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 19/35] target-i386: emulate LOCK'ed INC using atomic helper, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 18/35] target-i386: emulate LOCK'ed OP instructions using atomic helpers, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 21/35] target-i386: emulate LOCK'ed NEG using cmpxchg helper, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 20/35] target-i386: emulate LOCK'ed NOT using atomic helper, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 22/35] target-i386: emulate LOCK'ed XADD using atomic helper, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 23/35] target-i386: emulate LOCK'ed BTX ops using atomic helpers, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 24/35] target-i386: emulate XCHG using atomic helper, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 25/35] target-i386: remove helper_lock(), Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 26/35] tests: add atomic_add-bench, Richard Henderson, 2016/10/11
- Re: [Qemu-devel] [PATCH v6 26/35] tests: add atomic_add-bench,
Emilio G. Cota <=
- [Qemu-devel] [PATCH v6 27/35] target-arm: Rearrange aa32 load and store functions, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 28/35] target-arm: emulate LL/SC using cmpxchg helpers, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 29/35] target-arm: emulate SWP with atomic_xchg helper, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 31/35] linux-user: remove handling of ARM's EXCP_STREX, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 32/35] linux-user: remove handling of aarch64's EXCP_STREX, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 30/35] target-arm: emulate aarch64's LL/SC using cmpxchg helpers, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 33/35] target-arm: remove EXCP_STREX + cpu_exclusive_{test, info}, Richard Henderson, 2016/10/11
- [Qemu-devel] [PATCH v6 34/35] target-alpha: Introduce MMU_PHYS_IDX, Richard Henderson, 2016/10/11