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[Qemu-devel] [PULL 08/25] aspeed: create mapping regions for the maximum
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 08/25] aspeed: create mapping regions for the maximum number of slaves |
Date: |
Mon, 17 Oct 2016 19:40:27 +0100 |
From: Cédric Le Goater <address@hidden>
The SMC controller on the Aspeed SoC has a set of registers to
configure the mapping of each flash module in the SoC address
space. These mapping windows are configurable even though no SPI slave
is attached to the controller.
Also rewrite a bit the comments in the code on this topic.
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Andrew Jeffery <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/ssi/aspeed_smc.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 21943f4..ecf39cc 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -417,12 +417,15 @@ static void aspeed_smc_realize(DeviceState *dev, Error
**errp)
aspeed_smc_reset(dev);
+ /* The memory region for the controller registers */
memory_region_init_io(&s->mmio, OBJECT(s), &aspeed_smc_ops, s,
s->ctrl->name, ASPEED_SMC_R_MAX * 4);
sysbus_init_mmio(sbd, &s->mmio);
/*
- * Memory region where flash modules are remapped
+ * The container memory region representing the address space
+ * window in which the flash modules are mapped. The size and
+ * address depends on the SoC model and controller type.
*/
snprintf(name, sizeof(name), "%s.flash", s->ctrl->name);
@@ -431,9 +434,16 @@ static void aspeed_smc_realize(DeviceState *dev, Error
**errp)
s->ctrl->flash_window_size);
sysbus_init_mmio(sbd, &s->mmio_flash);
- s->flashes = g_new0(AspeedSMCFlash, s->num_cs);
+ s->flashes = g_new0(AspeedSMCFlash, s->ctrl->max_slaves);
- for (i = 0; i < s->num_cs; ++i) {
+ /*
+ * Let's create a sub memory region for each possible slave. All
+ * have a configurable memory segment in the overall flash mapping
+ * window of the controller but, there is not necessarily a flash
+ * module behind to handle the memory accesses. This depends on
+ * the board configuration.
+ */
+ for (i = 0; i < s->ctrl->max_slaves; ++i) {
AspeedSMCFlash *fl = &s->flashes[i];
snprintf(name, sizeof(name), "%s.%d", s->ctrl->name, i);
--
2.7.4
- [Qemu-devel] [PULL 00/25] target-arm queue, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 13/25] hw/arm/virt-acpi-build: fix MADT generation, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 12/25] hw/intc/arm_gic_kvm: Fix build on aarch64, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 10/25] hw/arm/boot: allow using a command line specified dtb without a kernel, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 08/25] aspeed: create mapping regions for the maximum number of slaves,
Peter Maydell <=
- [Qemu-devel] [PULL 20/25] target-arm: Comments added to identify cases in a switch, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 05/25] aspeed: move the flash module mapping address under the controller definition, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 04/25] aspeed: rename the smc object to fmc, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 24/25] hw/intc/arm_gicv3: Fix ICC register tracepoints, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 02/25] Reducing stack frame size in stream_process_mem2s(), Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 14/25] hw/arm/virt: no ITS on older machine types, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 15/25] tests: add a m25p80 test, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 21/25] Fix masking of PC lower bits when doing exception returns, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 19/25] target-arm: Code changes to implement overwrite of tag field on PC load, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 01/25] docs/generic-loader: Update the document, Peter Maydell, 2016/10/17