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Re: [Qemu-devel] [PATCH v2 0/2] POWER9 TCG enablements - part6


From: David Gibson
Subject: Re: [Qemu-devel] [PATCH v2 0/2] POWER9 TCG enablements - part6
Date: Thu, 20 Oct 2016 11:03:31 +1100
User-agent: Mutt/1.7.0 (2016-08-17)

On Wed, Oct 19, 2016 at 11:36:45AM +0530, Nikunj A Dadhania wrote:
> This series contains 6 new instructions for POWER9 ISA3.0
>    Vector Integer Negate 
>    Vector Byte-Reverse
> 
> Patches:
> 02:
>     vnegw: Vector Negate Word
>     vnegd: Vector Negate Doubleword
> 03:
>     xxbrh: VSX Vector Byte-Reverse Halfword
>     xxbrw: VSX Vector Byte-Reverse Word
>     xxbrd: VSX Vector Byte-Reverse Doubleword
>     xxbrq: VSX Vector Byte-Reverse Quadword

Applied to ppc-for-2.8, thanks.

> 
> Changelog:
> v1:
> * Remove unused 'mask' in the define
> * Fix bug in xxbrq: should have used move as the last
>   translate operation instead of bswap.
> 
> v0:
> * Added temporary in xxbrq
> * Use negate directly in place for computing 2's compliment
> * Use int8_t instead for char
> * Dropped "VSX Scalar Compare" as fpu_helper needs change 
>   with regard to exception flag handling
> 
> Nikunj A Dadhania (2):
>   target-ppc: implement vnegw/d instructions
>   target-ppc: implement xxbr[qdwh] instruction
> 
>  target-ppc/helper.h                 |  2 +
>  target-ppc/int_helper.c             | 12 ++++++
>  target-ppc/translate.c              | 32 +++++++++++++++
>  target-ppc/translate/vmx-impl.inc.c |  2 +
>  target-ppc/translate/vmx-ops.inc.c  |  2 +
>  target-ppc/translate/vsx-impl.inc.c | 77 
> +++++++++++++++++++++++++++++++++++++
>  target-ppc/translate/vsx-ops.inc.c  |  8 ++++
>  7 files changed, 135 insertions(+)
> 

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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