Re: [Qemu-devel] [PATCH v3 27/34] target-arm: emulate LL/SC using cmpxchg helpers

[Pranith Kumar]

On Thu, Oct 20, 2016 at 2:00 PM, Richard Henderson <address@hidden> wrote:
> On 10/20/2016 10:51 AM, Pranith Kumar wrote:
>>>
>>> Added back
>>>
>>> /* Load/Store exclusive instructions are implemented by remembering
>>>    the value/address loaded, and seeing if these are the same
>>>    when the store is performed.  This should be sufficient to implement
>>>    the architecturally mandated semantics, and avoids having to monitor
>>>    regular stores.  The compare vs the remembered value is done during
>>>    the cmpxchg operation, but we must compare the addresses manually.  */
>>>
>>
>> FYI, I do not see this in your v7 series.
>
>
> I do.  It's in patch 28:
>
>  /* Load/Store exclusive instructions are implemented by remembering
>     the value/address loaded, and seeing if these are the same
> -   when the store is performed. This should be sufficient to implement
> +   when the store is performed.  This should be sufficient to implement
>     the architecturally mandated semantics, and avoids having to monitor
> -   regular stores.
> -
> -   In system emulation mode only one CPU will be running at once, so
> -   this sequence is effectively atomic.  In user emulation mode we
> -   throw an exception and handle the atomic operation elsewhere.  */
> +   regular stores.  The compare vs the remembered value is done during
> +   the cmpxchg operation, but we must compare the addresses manually.  */
>

Indeed, I was looking at atomic-6 on github. atomic-7 is not there yet :)

Thanks,
--
Pranith