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Re: [Qemu-devel] [PATCH v5 00/17] ppc/pnv: booting the kernel and reachi


From: David Gibson
Subject: Re: [Qemu-devel] [PATCH v5 00/17] ppc/pnv: booting the kernel and reaching user space
Date: Tue, 25 Oct 2016 12:38:36 +1100
User-agent: Mutt/1.7.1 (2016-10-04)

On Mon, Oct 24, 2016 at 04:33:33PM +1100, David Gibson wrote:
> On Sat, Oct 22, 2016 at 11:46:33AM +0200, Cédric Le Goater wrote:
> > Hello,
> > 
> > Here is the latest version of the ppc/pnv platform patchset. PowerNV
> > (as Non-Virtualized) is the "baremetal" platform using the OPAL
> > firmware. It runs Linux on IBM and Open Power systems and it can be
> > used as an hypervisor OS, to run KVM guests, or simply as a host OS.
> > The goal here is to add support for the baremetal platform and
> > possibly later also for the KVM PR guests but not for HV guests.
> > 
> > In v5, all the comments from v4 should have been addressed. Most of
> > the differences are cleanups suggested by David but there a couple of
> > important changes :
> > 
> >  - an addition of a new firmware to qemu : skiboot 5.3.7.
> >  - a rework of the native Interrupt Presentation Controller model
> >    which now uses memory subregions instead of a hash table.   
> >  - a removal of the Power9 LPC Controller. This is still in the plans
> >    but the models need a little more work.
> > 
> > 
> > The initial patches provide a minimal platform with some RAM to load
> > the ROMs : firmware, kernel and initrd. The device tree is built with
> > what is available at reset time. Then, comes the PnvChip object acting
> > as a container for other devices required to run a system. The cores
> > are added to each chip with some restrictions on the number and the
> > ids. Next is the XSCOM model, the sideband bus which gives controls to
> > all the units in the POWER8 chip, the LPC controller for the console,
> > the native interrupt controller and the PSI HB model to handle the
> > external interrupt.
> > 
> > 
> > The next step should be IPMI support which adds a BT device on the ISA
> > bus and some device tree extensions to read sensors and FRUs. This is
> > relatively straight forward and most of the IPMI code has been
> > discussed already on the list. Then should come a PHB3 model to
> > include some PCI devices. This is big and it needs a few helpers in
> > the PCI core.
> 
> I've merged 1-6 into ppc-for-2.8.  The rest I'm still reviewing.

I've now merged 7-10 into ppc-for-2.8, making the change I requested
to xscom_complete() along the way.  Still looking at the rest.

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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