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[Qemu-devel] [PATCH 13/16] target-m68k: add addressing modes to neg
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH 13/16] target-m68k: add addressing modes to neg |
Date: |
Wed, 26 Oct 2016 18:36:03 +0200 |
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
target-m68k/translate.c | 20 ++++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 27bde2e..383709d 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -1631,16 +1631,20 @@ DISAS_INSN(move_from_ccr)
DISAS_INSN(neg)
{
- TCGv reg;
TCGv src1;
+ TCGv dest;
+ TCGv addr;
+ int opsize;
- reg = DREG(insn, 0);
- src1 = tcg_temp_new();
- tcg_gen_mov_i32(src1, reg);
- tcg_gen_neg_i32(reg, src1);
- gen_update_cc_add(reg, src1, OS_LONG);
- tcg_gen_setcondi_i32(TCG_COND_NE, QREG_CC_X, src1, 0);
- set_cc_op(s, CC_OP_SUBL);
+ opsize = insn_opsize(insn);
+ SRC_EA(env, src1, opsize, 1, &addr);
+ dest = tcg_temp_new();
+ tcg_gen_neg_i32(dest, src1);
+ set_cc_op(s, CC_OP_SUBB + opsize);
+ gen_update_cc_add(dest, src1, opsize);
+ tcg_gen_setcondi_i32(TCG_COND_NE, QREG_CC_X, dest, 0);
+ DEST_EA(env, insn, opsize, dest, &addr);
+ tcg_temp_free(dest);
}
static void gen_set_sr_im(DisasContext *s, uint16_t val, int ccr_only)
--
2.7.4
- [Qemu-devel] [PATCH 00/16] 680x0 instruction set, part 1, Laurent Vivier, 2016/10/26
- [Qemu-devel] [PATCH 06/16] target-m68k: add addressing modes to not, Laurent Vivier, 2016/10/26
- [Qemu-devel] [PATCH 09/16] target-m68k: and can manage word and byte operands, Laurent Vivier, 2016/10/26
- [Qemu-devel] [PATCH 02/16] target-m68k: add linkl, Laurent Vivier, 2016/10/26
- [Qemu-devel] [PATCH 08/16] target-m68k: or can manage word and byte operands, Laurent Vivier, 2016/10/26
- [Qemu-devel] [PATCH 10/16] target-m68k: suba/adda can manage word operand, Laurent Vivier, 2016/10/26
- [Qemu-devel] [PATCH 14/16] target-m68k: add/sub manage word and byte operands, Laurent Vivier, 2016/10/26
- [Qemu-devel] [PATCH 13/16] target-m68k: add addressing modes to neg,
Laurent Vivier <=
- [Qemu-devel] [PATCH 04/16] target-m68k: add scc/dbcc, Laurent Vivier, 2016/10/26
- [Qemu-devel] [PATCH 11/16] target-m68k: some bit ops cleanup, Laurent Vivier, 2016/10/26
- [Qemu-devel] [PATCH 07/16] target-m68k: eor can manage word and byte operands, Laurent Vivier, 2016/10/26
- [Qemu-devel] [PATCH 12/16] target-m68k: introduce byte and word cc_ops, Laurent Vivier, 2016/10/26
- [Qemu-devel] [PATCH 01/16] target-m68k: add bkpt instruction, Laurent Vivier, 2016/10/26
- [Qemu-devel] [PATCH 03/16] target-m68k: add exg ops, Laurent Vivier, 2016/10/26