Re: [Qemu-devel] [PATCH v2 17/18] target-ppc: Use the new deposit and extract ops

[David Gibson]

On Tue, Oct 18, 2016 at 08:10:30AM -0700, Richard Henderson wrote:
> Use the new primitives for RDWINM and RLDICL.
> 
> Signed-off-by: Richard Henderson <address@hidden>

Reviewed-by: David Gibson <address@hidden>

> ---
>  target-ppc/translate.c | 35 +++++++++++++++++++----------------
>  1 file changed, 19 insertions(+), 16 deletions(-)
> 
> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> index bfc1301..7b12303 100644
> --- a/target-ppc/translate.c
> +++ b/target-ppc/translate.c
> @@ -1970,16 +1970,16 @@ static void gen_rlwinm(DisasContext *ctx)
>  {
>      TCGv t_ra = cpu_gpr[rA(ctx->opcode)];
>      TCGv t_rs = cpu_gpr[rS(ctx->opcode)];
> -    uint32_t sh = SH(ctx->opcode);
> -    uint32_t mb = MB(ctx->opcode);
> -    uint32_t me = ME(ctx->opcode);
> -
> -    if (mb == 0 && me == (31 - sh)) {
> -        tcg_gen_shli_tl(t_ra, t_rs, sh);
> -        tcg_gen_ext32u_tl(t_ra, t_ra);
> -    } else if (sh != 0 && me == 31 && sh == (32 - mb)) {
> -        tcg_gen_ext32u_tl(t_ra, t_rs);
> -        tcg_gen_shri_tl(t_ra, t_ra, mb);
> +    int sh = SH(ctx->opcode);
> +    int mb = MB(ctx->opcode);
> +    int me = ME(ctx->opcode);
> +    int len = me - mb + 1;
> +    int rsh = (32 - sh) & 31;
> +
> +    if (sh != 0 && len > 0 && me == (31 - sh)) {
> +        tcg_gen_deposit_z_tl(t_ra, t_rs, sh, len);
> +    } else if (me == 31 && rsh + len <= 32) {
> +        tcg_gen_extract_tl(t_ra, t_rs, rsh, len);
>      } else {
>          target_ulong mask;
>  #if defined(TARGET_PPC64)
> @@ -1987,8 +1987,9 @@ static void gen_rlwinm(DisasContext *ctx)
>          me += 32;
>  #endif
>          mask = MASK(mb, me);
> -
> -        if (mask <= 0xffffffffu) {
> +        if (sh == 0) {
> +            tcg_gen_andi_tl(t_ra, t_rs, mask);
> +        } else if (mask <= 0xffffffffu) {
>              TCGv_i32 t0 = tcg_temp_new_i32();
>              tcg_gen_trunc_tl_i32(t0, t_rs);
>              tcg_gen_rotli_i32(t0, t0, sh);
> @@ -2091,11 +2092,13 @@ static void gen_rldinm(DisasContext *ctx, int mb, int 
> me, int sh)
>  {
>      TCGv t_ra = cpu_gpr[rA(ctx->opcode)];
>      TCGv t_rs = cpu_gpr[rS(ctx->opcode)];
> +    int len = me - mb + 1;
> +    int rsh = (64 - sh) & 63;
>  
> -    if (sh != 0 && mb == 0 && me == (63 - sh)) {
> -        tcg_gen_shli_tl(t_ra, t_rs, sh);
> -    } else if (sh != 0 && me == 63 && sh == (64 - mb)) {
> -        tcg_gen_shri_tl(t_ra, t_rs, mb);
> +    if (sh != 0 && len > 0 && me == (63 - sh)) {
> +        tcg_gen_deposit_z_tl(t_ra, t_rs, sh, len);
> +    } else if (me == 63 && rsh + len <= 64) {
> +        tcg_gen_extract_tl(t_ra, t_rs, rsh, len);
>      } else {
>          tcg_gen_rotli_tl(t_ra, t_rs, sh);
>          tcg_gen_andi_tl(t_ra, t_ra, MASK(mb, me));

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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