[Qemu-devel] [PATCH v2 0/3] 680x0 instruction set, part 2

[Laurent Vivier]

This series is another subset of the series I sent in May:
https://lists.gnu.org/archive/html/qemu-devel/2016-05/msg00501.html

It must be applied on top of series:
"target-m68k: 680x0 instruction set, part 1"

This subset contains reworked patches for:
- cmpm, delay the writeback of the value of the register
  after the second load to avoid problem with page fault,
- shift instruction, compute V flags as advised by Richard

I've checked it doesn't break coldfire support:
http://wiki.qemu.org/download/coldfire-test-0.1.tar.bz2
but it can't boot a 680x0 processor kernel.

v2:
- don't modify gen_extend() prototype
- use one "sari" instead of two "shri"s
- use "movi 0" to set QREG_CC_V to zero

Laurent Vivier (2):
  target-m68k: add cmpm
  target-m68k: shift ops manage word and byte operands

Richard Henderson (1):
  target-m68k: Inline shifts

 target-m68k/helper.c    |  52 ----------
 target-m68k/helper.h    |   3 -
 target-m68k/translate.c | 255 +++++++++++++++++++++++++++++++++++++++++++-----
 3 files changed, 229 insertions(+), 81 deletions(-)

-- 
2.7.4