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Re: [Qemu-devel] [PATCH v5 30/33] target-arm/cpu: don't reset TLB struct
From: |
Alex Bennée |
Subject: |
Re: [Qemu-devel] [PATCH v5 30/33] target-arm/cpu: don't reset TLB structures, use cputlb to do it |
Date: |
Fri, 28 Oct 2016 09:38:59 +0100 |
User-agent: |
mu4e 0.9.17; emacs 25.1.50.12 |
Richard Henderson <address@hidden> writes:
> On 10/27/2016 08:10 AM, Alex Bennée wrote:
>> cputlb owns the TLB entries and knows how to safely update them in
>> MTTCG.
>>
>> Signed-off-by: Alex Bennée <address@hidden>
>> ---
>> target-arm/cpu.c | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/target-arm/cpu.c b/target-arm/cpu.c
>> index 1b9540e..ff8c594 100644
>> --- a/target-arm/cpu.c
>> +++ b/target-arm/cpu.c
>> @@ -121,7 +121,13 @@ static void arm_cpu_reset(CPUState *s)
>>
>> acc->parent_reset(s);
>>
>> +#ifdef CONFIG_SOFTMMU
>> + memset(env, 0, offsetof(CPUARMState, tlb_table));
>> + tlb_flush(s, 0);
>> +#else
>> memset(env, 0, offsetof(CPUARMState, features));
>> +#endif
>> +
>
> Why special case this for softmmu?
I didn't want to move cpu->features to the other side of CPU_COMMON in
cpu.h as there is an explicit statement about being reset. Adding
another variable just to be an endpoint of a memset also seemed
sub-optimal.
> And don't we (or if not, shouldn't we)
> handle the tlb_flush generically for reset?
Probably. tlb_flush seems to be one of those things liberally sprinkled
in the arch code for all sorts of things but certainly cpu_reset is one
we could make the call from generic code.
>
>
> r~
--
Alex Bennée
- [Qemu-devel] [PATCH v5 18/33] tcg: remove global exit_request, (continued)
- [Qemu-devel] [PATCH v5 18/33] tcg: remove global exit_request, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 15/33] tcg: rename tcg_current_cpu to tcg_current_rr_cpu, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 06/33] tcg: comment on which functions have to be called with tb_lock held, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 11/33] tcg: move tcg_exec_all and helpers above thread fn, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 27/33] cputlb: atomically update tlb fields used by tlb_reset_dirty, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 24/33] cputlb: add assert_cpu_is_self checks, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 25/33] cputlb: introduce tlb_flush_* async work., Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 31/33] target-arm: ensure BQL taken for ARM_CP_IO register access, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 30/33] target-arm/cpu: don't reset TLB structures, use cputlb to do it, Alex Bennée, 2016/10/27
[Qemu-devel] [PATCH v5 19/33] tcg: move locking for tb_invalidate_phys_page_range up, Alex Bennée, 2016/10/27
[Qemu-devel] [PATCH v5 21/33] tcg: enable thread-per-vCPU, Alex Bennée, 2016/10/27
[Qemu-devel] [PATCH v5 33/33] tcg: enable MTTCG by default for ARM on x86 hosts, Alex Bennée, 2016/10/27
[Qemu-devel] [PATCH v5 32/33] target-arm: helpers which may affect global state need the BQL, Alex Bennée, 2016/10/27
[Qemu-devel] [PATCH v5 29/33] target-arm/powerctl: defer cpu reset work to CPU context, Alex Bennée, 2016/10/27
[Qemu-devel] [PATCH v5 28/33] cputlb: make tlb_flush_by_mmuidx safe for MTTCG, Alex Bennée, 2016/10/27
[Qemu-devel] [PATCH v5 26/33] cputlb: tweak qemu_ram_addr_from_host_nofail reporting, Alex Bennée, 2016/10/27
[Qemu-devel] [PATCH v5 20/33] tcg: enable tb_lock() for SoftMMU, Alex Bennée, 2016/10/27