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Re: [Qemu-devel] [PATCH 5/5] Fix typo in arm_cpu_do_interrupt_aarch32.
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 5/5] Fix typo in arm_cpu_do_interrupt_aarch32. |
Date: |
Fri, 4 Nov 2016 13:02:53 +0000 |
On 3 November 2016 at 21:26, Julian Brown <address@hidden> wrote:
> This appears to be a typo in arm_cpu_do_interrupt_aarch32 (OR'ing with ~CPSR_E
> instead of CPSR_E).
>
> Signed-off-by: Julian Brown <address@hidden>
> ---
> target-arm/helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 25b15dc..b5b65ca 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -6438,7 +6438,7 @@ static void arm_cpu_do_interrupt_aarch32(CPUState *cs)
> /* Set new mode endianness */
> env->uncached_cpsr &= ~CPSR_E;
> if (env->cp15.sctlr_el[arm_current_el(env)] & SCTLR_EE) {
> - env->uncached_cpsr |= ~CPSR_E;
> + env->uncached_cpsr |= CPSR_E;
> }
> env->daif |= mask;
> /* this is a lie, as the was no c1_sys on V4T/V5, but who cares
> --
> 1.9.1
This is an obvious bugfix so I've applied it to target-arm.next
for 2.8. I tweaked the commit message a bit to say what the
effects of the bug were.
thanks
-- PMM
[Qemu-devel] [PATCH 3/5] Fix arm_semi_flen_cb for BE32 system mode., Julian Brown, 2016/11/03
[Qemu-devel] [PATCH 4/5] ARM BE32 watchpoint fix., Julian Brown, 2016/11/03
[Qemu-devel] [PATCH 5/5] Fix typo in arm_cpu_do_interrupt_aarch32., Julian Brown, 2016/11/03
- Re: [Qemu-devel] [PATCH 5/5] Fix typo in arm_cpu_do_interrupt_aarch32.,
Peter Maydell <=
Re: [Qemu-devel] [PATCH 0/5] ARM BE8/BE32 big-endian system-mode fixes (semihosting, gdbstub), no-reply, 2016/11/03
Re: [Qemu-devel] [PATCH 0/5] ARM BE8/BE32 big-endian system-mode fixes (semihosting, gdbstub), no-reply, 2016/11/03