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[Qemu-devel] [PATCH 2/5] target-m68k: Do not cpu_abort on undefined insn
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 2/5] target-m68k: Do not cpu_abort on undefined insns |
Date: |
Sat, 5 Nov 2016 23:18:40 -0700 |
Report this properly via exception and, importantly, allow
the disassembler the chance to tell us what insn is not handled.
Signed-off-by: Richard Henderson <address@hidden>
---
target-m68k/translate.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 60c8b4b..2f956d9 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -1214,10 +1214,12 @@ DISAS_INSN(undef_fpu)
DISAS_INSN(undef)
{
- M68kCPU *cpu = m68k_env_get_cpu(env);
-
+ /* ??? This is both instructions that are as yet unimplemented
+ for the 680x0 series, as well as those that are implemented
+ but actually illegal for CPU32 or pre-68020. */
+ qemu_log_mask(LOG_UNIMP, "Illegal instruction: %04x @ %08x",
+ insn, s->pc - 2);
gen_exception(s, s->pc - 2, EXCP_UNSUPPORTED);
- cpu_abort(CPU(cpu), "Illegal instruction: %04x @ %08x", insn, s->pc - 2);
}
DISAS_INSN(mulw)
--
2.7.4
- [Qemu-devel] [PATCH 0/5] target-m68k patches, Richard Henderson, 2016/11/06
- [Qemu-devel] [PATCH 2/5] target-m68k: Do not cpu_abort on undefined insns,
Richard Henderson <=
- [Qemu-devel] [PATCH 1/5] target-m68k: implement 680x0 movem, Richard Henderson, 2016/11/06
- [Qemu-devel] [PATCH 4/5] target-m68k: Implement bitfield ops for registers, Richard Henderson, 2016/11/06
- [Qemu-devel] [PATCH 3/5] target-m68k: Inline shifts, Richard Henderson, 2016/11/06
- [Qemu-devel] [PATCH 5/5] target-m68k: Implement bitfield ops for memory, Richard Henderson, 2016/11/06
- Re: [Qemu-devel] [PATCH 0/5] target-m68k patches, Laurent Vivier, 2016/11/06