Re: [Qemu-devel] [PATCH v6 13/19] cputlb: atomically update tlb fields used by tlb_reset_dirty

[Alex Bennée]

Richard Henderson <address@hidden> writes:

> On 11/10/2016 05:14 PM, Alex Bennée wrote:
>> Even worse than that we trip up the atomic.h QEMU_BUILD_BUG_ON with the
>> atomic_cmpxchg. Now I believe we can use atomic_cmpxchg__nocheck without
>> too much issue on x86 but we'll need to #ifdef it on detection of wide
>> atomics.
>
> You've already got CONFIG_ATOMIC64.  And what's the fallback?

I'm going to re-factor cputlb a bit so all the TLB read and write's can
be done in helper functions so I don't scatter stuff around too much. I
was thinking something like:

#ifdef CONFIG_ATOMIC64
  .. as usual ..
#else
  assert(!parallel_cpus)
  .. non atomic update ..
#endif

> We ought not be enabling mttcg for 32-bit host and 64-bit guest at all.  But
> that doesn't help much here, where we're otherwise guest width
> agnostic.

Hmm well the most common case (any guest on x86) should work. Currently
the default mttcg code in cpus.c works when:

  #if defined(CONFIG_MTTCG_TARGET) && defined(CONFIG_MTTCG_HOST)

I should probably expand that to default to false in the case of (sizeof
target_ulong > sizeof void *) when we don't have CONFIG_ATOMIC64.

Then if the user does force mttcg on they will quickly get an assert
although maybe we want to report that in a nicer way?

>
>
> r~


--
Alex Bennée