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[Qemu-devel] [PATCH v2 3/4] ppc/pnv: Fix fatal bug on 32-bit hosts
From: |
Cédric Le Goater |
Subject: |
[Qemu-devel] [PATCH v2 3/4] ppc/pnv: Fix fatal bug on 32-bit hosts |
Date: |
Mon, 14 Nov 2016 10:12:57 +0100 |
From: David Gibson <address@hidden>
If the pnv machine type is compiled on a 32-bit host, the unsigned long
(host) type is 32-bit. This means that the hweight_long() used to
calculate the number of allowed cores only considers the low 32 bits of
the cores_mask variable, and can thus return 0 in some circumstances.
This corrects the bug.
Signed-off-by: David Gibson <address@hidden>
Suggested-by: Richard Henderson <address@hidden>
[clg: replaced hweight_long() by ctpop64() ]
Signed-off-by: Cédric Le Goater <address@hidden>
---
hw/ppc/pnv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index e7779581545d..9df7b25315af 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -620,7 +620,7 @@ static void pnv_chip_core_sanitize(PnvChip *chip, Error
**errp)
chip->cores_mask &= pcc->cores_mask;
/* now that we have a sane layout, let check the number of cores */
- cores_max = hweight_long(chip->cores_mask);
+ cores_max = ctpop64(chip->cores_mask);
if (chip->nr_cores > cores_max) {
error_setg(errp, "warning: too many cores for chip ! Limit is %d",
cores_max);
--
2.7.4
- [Qemu-devel] [PATCH v2 0/4] ppc/pnv: XSCOM fixes and unit tests, Cédric Le Goater, 2016/11/14
- [Qemu-devel] [PATCH v2 1/4] ppc/pnv: add a 'xscom_core_base' field to PnvChipClass, Cédric Le Goater, 2016/11/14
- [Qemu-devel] [PATCH v2 2/4] ppc/pnv: fix xscom address translation for POWER9, Cédric Le Goater, 2016/11/14
- [Qemu-devel] [PATCH v2 3/4] ppc/pnv: Fix fatal bug on 32-bit hosts,
Cédric Le Goater <=
- [Qemu-devel] [PATCH v2 4/4] tests: add XSCOM tests for the PowerNV machine, Cédric Le Goater, 2016/11/14
- Re: [Qemu-devel] [PATCH v2 0/4] ppc/pnv: XSCOM fixes and unit tests, no-reply, 2016/11/14
- Re: [Qemu-devel] [PATCH v2 0/4] ppc/pnv: XSCOM fixes and unit tests, David Gibson, 2016/11/14