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[Qemu-devel] [PATCH] ppc: BOOK3E: nothing should be done when MSR:PR is
From: |
Vladimir Svoboda |
Subject: |
[Qemu-devel] [PATCH] ppc: BOOK3E: nothing should be done when MSR:PR is set |
Date: |
Thu, 17 Nov 2016 14:49:48 +0100 |
The server architecture (BOOK3S) specifies that any instruction that
sets MSR:PR will also set MSR:EE, IR and DR.
However there is no such behavior specification for the embedded
architecture (BOOK3E).
Signed-off-by: Vladimir Svoboda <address@hidden>
---
target-ppc/helper_regs.h | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h
index bb9ce60..6213816 100644
--- a/target-ppc/helper_regs.h
+++ b/target-ppc/helper_regs.h
@@ -131,11 +131,14 @@ static inline int hreg_store_msr(CPUPPCState *env,
target_ulong value,
}
/* If PR=1 then EE, IR and DR must be 1
*
- * Note: We only enforce this on 64-bit processors. It appears that
- * 32-bit implementations supports PR=1 and EE/DR/IR=0 and MacOS
- * exploits it.
+ * Note: We only enforce this on 64-bit server processors.
+ * It appears that:
+ * - 32-bit implementations supports PR=1 and EE/DR/IR=0 and MacOS
+ * exploits it.
+ * - 64-bit embedded implementations do not need any operation to be
+ * performed when PR is set.
*/
- if ((env->insns_flags & PPC_64B) && ((value >> MSR_PR) & 1)) {
+ if ((env->insns_flags & PPC_SEGMENT_64B) && ((value >> MSR_PR) & 1)) {
value |= (1 << MSR_EE) | (1 << MSR_DR) | (1 << MSR_IR);
}
#endif
--
2.10.2
- [Qemu-devel] [PATCH] ppc: BOOK3E: nothing should be done when MSR:PR is set,
Vladimir Svoboda <=