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[Qemu-devel] [PATCH v4 16/64] target-mips: Use the new extract op
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v4 16/64] target-mips: Use the new extract op |
Date: |
Wed, 23 Nov 2016 14:01:13 +0100 |
Use extract for EXT and DEXT.
Reviewed-by: Yongbok Kim <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target-mips/translate.c | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index d8dde7a..cf79aa4 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -4484,11 +4484,12 @@ static void gen_bitops (DisasContext *ctx, uint32_t
opc, int rt,
if (lsb + msb > 31) {
goto fail;
}
- tcg_gen_shri_tl(t0, t1, lsb);
if (msb != 31) {
- tcg_gen_andi_tl(t0, t0, (1U << (msb + 1)) - 1);
+ tcg_gen_extract_tl(t0, t1, lsb, msb + 1);
} else {
- tcg_gen_ext32s_tl(t0, t0);
+ /* The two checks together imply that lsb == 0,
+ so this is a simple sign-extension. */
+ tcg_gen_ext32s_tl(t0, t1);
}
break;
#if defined(TARGET_MIPS64)
@@ -4503,10 +4504,7 @@ static void gen_bitops (DisasContext *ctx, uint32_t opc,
int rt,
if (lsb + msb > 63) {
goto fail;
}
- tcg_gen_shri_tl(t0, t1, lsb);
- if (msb != 63) {
- tcg_gen_andi_tl(t0, t0, (1ULL << (msb + 1)) - 1);
- }
+ tcg_gen_extract_tl(t0, t1, lsb, msb + 1);
break;
#endif
case OPC_INS:
--
2.7.4
- [Qemu-devel] [PATCH v4 05/64] tcg/arm: Move isa detection to tcg-target.h, (continued)
- [Qemu-devel] [PATCH v4 05/64] tcg/arm: Move isa detection to tcg-target.h, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 08/64] tcg/mips: Implement field extraction opcodes, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 06/64] tcg/arm: Implement field extraction opcodes, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 07/64] tcg/i386: Implement field extraction opcodes, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 09/64] tcg/ppc: Implement field extraction opcodes, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 11/64] tcg/s390: Implement field extraction opcodes, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 10/64] tcg/s390: Expose host facilities to tcg-target.h, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 12/64] tcg/s390: Support deposit into zero, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 13/64] target-alpha: Use deposit and extract ops, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 14/64] target-arm: Use new deposit and extract ops, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 16/64] target-mips: Use the new extract op,
Richard Henderson <=
- [Qemu-devel] [PATCH v4 15/64] target-i386: Use new deposit and extract ops, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 17/64] target-ppc: Use the new deposit and extract ops, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 19/64] tcg/optimize: Fold movcond 0/1 into setcond, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 18/64] target-s390x: Use the new deposit and extract ops, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 20/64] tcg: Add markup for output requires new register, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 22/64] tcg: Pass the opcode width to target_parse_constraint, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 21/64] tcg: Transition flat op_defs array to a target callback, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 25/64] disas/i386.c: Handle tzcnt, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 23/64] tcg: Allow an operand to be matching or a constant, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 26/64] disas/ppc: Handle popcnt and cnttz, Richard Henderson, 2016/11/23