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[Qemu-devel] [PATCH v2 ppc-for-2.9 0/6] POWER9 TCG enablements - part9
From: |
Nikunj A Dadhania |
Subject: |
[Qemu-devel] [PATCH v2 ppc-for-2.9 0/6] POWER9 TCG enablements - part9 |
Date: |
Fri, 9 Dec 2016 17:47:19 +0530 |
This series contains 6 new instructions for POWER9 ISA3.0
VSX Vector Insert/Extract Word
VSX Load/Store with length
Although, lxvl/lxvll and stxvl/stxvll can be combined as single patch,
have left it for detailed commit log for instruction explanation.
Changelog:
v1:
* Combine helpers of lxvl and lxvll
* Combine helpers of stxvl and stxvll
* Rework xxextractuw and xxinsertw to simplify helper
v0:
* Fixed lxvl/lxvll and stxvl/stxvll as suggested by Richard
* Dropped mask_u128, which is not needed anymore
* Prevent UIMM > 12 in xxextractuw
* Drop xori from xsnegqp
* Rewrite xxperm/xxpermr without double copy
Nikunj A Dadhania (6):
target-ppc: implement lxvl instruction
target-ppc: implement lxvll instruction
target-ppc: implement stxvl instruction
target-ppc: implement stxvll instructions
target-ppc: implement xxextractuw instruction
target-ppc: implement xxinsertw instruction
target-ppc/helper.h | 8 +++++
target-ppc/int_helper.c | 42 +++++++++++++++++++++++
target-ppc/mem_helper.c | 66 +++++++++++++++++++++++++++++++++++++
target-ppc/translate/vsx-impl.inc.c | 60 +++++++++++++++++++++++++++++++++
target-ppc/translate/vsx-ops.inc.c | 14 ++++++++
5 files changed, 190 insertions(+)
--
2.7.4
- [Qemu-devel] [PATCH v2 ppc-for-2.9 0/6] POWER9 TCG enablements - part9,
Nikunj A Dadhania <=
- [Qemu-devel] [PATCH v2 2/6] target-ppc: implement lxvll instruction, Nikunj A Dadhania, 2016/12/09
- [Qemu-devel] [PATCH v2 3/6] target-ppc: implement stxvl instruction, Nikunj A Dadhania, 2016/12/09
- [Qemu-devel] [PATCH v2 1/6] target-ppc: implement lxvl instruction, Nikunj A Dadhania, 2016/12/09
- [Qemu-devel] [PATCH v2 4/6] target-ppc: implement stxvll instructions, Nikunj A Dadhania, 2016/12/09
- [Qemu-devel] [PATCH v2 5/6] target-ppc: implement xxextractuw instruction, Nikunj A Dadhania, 2016/12/09