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[Qemu-devel] [PULL 14/25] target-i386: Add Intel SHA_NI instruction supp
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 14/25] target-i386: Add Intel SHA_NI instruction support. |
Date: |
Thu, 22 Dec 2016 16:22:49 +0100 |
From: Yi Sun <address@hidden>
Add SHA_NI feature bit. Its spec can be found at:
https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf
Signed-off-by: Yi Sun <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
target/i386/cpu.c | 2 +-
target/i386/cpu.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index de1f30e..993f825 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -422,7 +422,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
"avx512f", "avx512dq", "rdseed", "adx",
"smap", "avx512ifma", "pcommit", "clflushopt",
"clwb", NULL, "avx512pf", "avx512er",
- "avx512cd", NULL, "avx512bw", "avx512vl",
+ "avx512cd", "sha-ni", "avx512bw", "avx512vl",
},
.cpuid_eax = 7,
.cpuid_needs_ecx = true, .cpuid_ecx = 0,
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index c605724..d0bf624 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -621,6 +621,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
#define CPUID_7_0_EBX_AVX512PF (1U << 26) /* AVX-512 Prefetch */
#define CPUID_7_0_EBX_AVX512ER (1U << 27) /* AVX-512 Exponential and
Reciprocal */
#define CPUID_7_0_EBX_AVX512CD (1U << 28) /* AVX-512 Conflict Detection */
+#define CPUID_7_0_EBX_SHA_NI (1U << 29) /* SHA1/SHA256 Instruction
Extensions */
#define CPUID_7_0_EBX_AVX512BW (1U << 30) /* AVX-512 Byte and Word
Instructions */
#define CPUID_7_0_EBX_AVX512VL (1U << 31) /* AVX-512 Vector Length Extensions
*/
--
2.9.3
- [Qemu-devel] [PULL 07/25] rules.mak: add more rules to avoid chaining, (continued)
- [Qemu-devel] [PULL 07/25] rules.mak: add more rules to avoid chaining, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 08/25] build-sys: remove libtool left-over, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 06/25] rules.mak: speedup save-vars load-vars, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 09/25] virtio-scsi: introduce virtio_scsi_acquire/release, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 10/25] qemu-timer: check active_timers outside lock/event, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 11/25] timer: fix misleading comment in timer.h, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 12/25] main-loop: update comment for qemu_mutex_lock/unlock_iothread, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 13/25] block: drop remaining legacy aio functions in comment, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 15/25] pc: make smbus configurable, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 17/25] pc: make pit configurable, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 14/25] target-i386: Add Intel SHA_NI instruction support.,
Paolo Bonzini <=
- [Qemu-devel] [PULL 16/25] pc: make sata configurable, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 19/25] multiboot: copy the cmdline verbatim, unescape module strings, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 20/25] hw/block/pflash_cfi*.c: fix confusing assert fail message, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 18/25] x86: Fix x86_64 'g' packet response to gdb from 32-bit mode., Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 21/25] scsi-disk: fix VERIFY for scsi-block, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 22/25] kvm: sync linux headers, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 24/25] target-i386: Fix eflags.TF/#DB handling of syscall/sysret insns, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 23/25] kvmclock: reduce kvmclock difference on migration, Paolo Bonzini, 2016/12/22
- [Qemu-devel] [PULL 25/25] x86: implement la57 paging mode, Paolo Bonzini, 2016/12/22
- Re: [Qemu-devel] [PULL 00/25] First round of misc patches for QEMU 2.9, no-reply, 2016/12/22