[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH V4 07/10] acpi: add ATSR for q35
From: |
Jason Wang |
Subject: |
[Qemu-devel] [PATCH V4 07/10] acpi: add ATSR for q35 |
Date: |
Fri, 30 Dec 2016 18:09:16 +0800 |
This patch provides ATSR which was a requirement for software that
wants to enable ATS on endpoint devices behind a Root Port. This is
done simply by setting ALL_PORTS which indicates all PCI-Express Root
Ports support ATS transactions.
Signed-off-by: Jason Wang <address@hidden>
---
hw/i386/acpi-build.c | 9 +++++++++
include/hw/acpi/acpi-defs.h | 12 ++++++++++++
2 files changed, 21 insertions(+)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 42ecf61..4609db1 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2575,6 +2575,7 @@ build_dmar_q35(GArray *table_data, BIOSLinker *linker)
AcpiTableDmar *dmar;
AcpiDmarHardwareUnit *drhd;
+ AcpiDmarRootPortATS *atsr;
uint8_t dmar_flags = 0;
X86IOMMUState *iommu = x86_iommu_get_default();
AcpiDmarDeviceScope *scope = NULL;
@@ -2608,6 +2609,14 @@ build_dmar_q35(GArray *table_data, BIOSLinker *linker)
scope->path[0].device = PCI_SLOT(Q35_PSEUDO_DEVFN_IOAPIC);
scope->path[0].function = PCI_FUNC(Q35_PSEUDO_DEVFN_IOAPIC);
+ if (iommu->dt_supported) {
+ atsr = acpi_data_push(table_data, sizeof(*atsr));
+ atsr->type = cpu_to_le16(ACPI_DMAR_TYPE_ATSR);
+ atsr->length = cpu_to_le16(sizeof(*atsr));
+ atsr->flags = ACPI_DMAR_ATSR_ALL_PORTS;
+ atsr->pci_segment = cpu_to_le16(0);
+ }
+
build_header(linker, table_data, (void *)(table_data->data + dmar_start),
"DMAR", table_data->len - dmar_start, 1, NULL, NULL);
}
diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
index 154f3b8..e4dd523 100644
--- a/include/hw/acpi/acpi-defs.h
+++ b/include/hw/acpi/acpi-defs.h
@@ -638,8 +638,20 @@ struct AcpiDmarHardwareUnit {
} QEMU_PACKED;
typedef struct AcpiDmarHardwareUnit AcpiDmarHardwareUnit;
+/* Type 2: Root Port ATS Capability Reporting Structure */
+struct AcpiDmarRootPortATS {
+ uint16_t type;
+ uint16_t length;
+ uint8_t flags;
+ uint8_t reserved;
+ uint16_t pci_segment;
+ AcpiDmarDeviceScope scope[0];
+} QEMU_PACKED;
+typedef struct AcpiDmarRootPortATS AcpiDmarRootPortATS;
+
/* Masks for Flags field above */
#define ACPI_DMAR_INCLUDE_PCI_ALL 1
+#define ACPI_DMAR_ATSR_ALL_PORTS 1
/*
* Input Output Remapping Table (IORT)
--
2.7.4
- [Qemu-devel] [PATCH V4 00/10] vhost device IOTLB support, Jason Wang, 2016/12/30
- [Qemu-devel] [PATCH V4 02/10] intel_iommu: name vtd address space with devfn, Jason Wang, 2016/12/30
- [Qemu-devel] [PATCH V4 01/10] virtio: convert to use DMA api, Jason Wang, 2016/12/30
- [Qemu-devel] [PATCH V4 03/10] intel_iommu: allocate new key when creating new address space, Jason Wang, 2016/12/30
- [Qemu-devel] [PATCH V4 04/10] exec: introduce address_space_get_iotlb_entry(), Jason Wang, 2016/12/30
- [Qemu-devel] [PATCH V4 05/10] intel_iommu: support device iotlb descriptor, Jason Wang, 2016/12/30
- [Qemu-devel] [PATCH V4 07/10] acpi: add ATSR for q35,
Jason Wang <=
- [Qemu-devel] [PATCH V4 06/10] virtio-pci: address space translation service (ATS) support, Jason Wang, 2016/12/30
- [Qemu-devel] [PATCH V4 08/10] memory: handle alias for iommu notifier, Jason Wang, 2016/12/30
- [Qemu-devel] [PATCH V4 09/10] memory: handle alias in memory_region_is_iommu(), Jason Wang, 2016/12/30
- [Qemu-devel] [PATCH V4 10/10] vhost_net: device IOTLB support, Jason Wang, 2016/12/30